Changeset 5c9b2c4 in freewrt
- Timestamp:
- Dec 20, 2006, 8:14:36 PM (19 years ago)
- Children:
- 915b4df
- Parents:
- 7e45202
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
target/linux/rb-2.6/patches/100-rb5xx_support.patch
r7e45202 r5c9b2c4 1 1 diff -Naurp linux-2.6.19.1/arch/mips/Kconfig linux-2.6.19.1.patched/arch/mips/Kconfig 2 2 --- linux-2.6.19.1/arch/mips/Kconfig 2006-12-11 20:32:53.000000000 +0100 3 +++ linux-2.6.19.1.patched/arch/mips/Kconfig 2006-12- 18 22:36:01.000000000 +01003 +++ linux-2.6.19.1.patched/arch/mips/Kconfig 2006-12-20 17:20:43.000000000 +0100 4 4 @@ -728,6 +728,19 @@ config TOSHIBA_JMR3927 5 5 select SYS_SUPPORTS_BIG_ENDIAN … … 33 33 diff -Naurp linux-2.6.19.1/arch/mips/Makefile linux-2.6.19.1.patched/arch/mips/Makefile 34 34 --- linux-2.6.19.1/arch/mips/Makefile 2006-12-11 20:32:53.000000000 +0100 35 +++ linux-2.6.19.1.patched/arch/mips/Makefile 2006-12- 18 22:36:01.000000000 +010035 +++ linux-2.6.19.1.patched/arch/mips/Makefile 2006-12-20 17:20:43.000000000 +0100 36 36 @@ -586,6 +586,13 @@ cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iin 37 37 load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000 … … 50 50 diff -Naurp linux-2.6.19.1/arch/mips/mm/tlbex.c linux-2.6.19.1.patched/arch/mips/mm/tlbex.c 51 51 --- linux-2.6.19.1/arch/mips/mm/tlbex.c 2006-12-11 20:32:53.000000000 +0100 52 +++ linux-2.6.19.1.patched/arch/mips/mm/tlbex.c 2006-12- 18 22:36:01.000000000 +010052 +++ linux-2.6.19.1.patched/arch/mips/mm/tlbex.c 2006-12-20 17:20:43.000000000 +0100 53 53 @@ -874,7 +874,6 @@ static __init void build_tlb_write_entry 54 54 case CPU_R10000: … … 69 69 diff -Naurp linux-2.6.19.1/arch/mips/pci/fixup-rc32434.c linux-2.6.19.1.patched/arch/mips/pci/fixup-rc32434.c 70 70 --- linux-2.6.19.1/arch/mips/pci/fixup-rc32434.c 1970-01-01 01:00:00.000000000 +0100 71 +++ linux-2.6.19.1.patched/arch/mips/pci/fixup-rc32434.c 2006-12- 18 22:36:01.000000000 +010071 +++ linux-2.6.19.1.patched/arch/mips/pci/fixup-rc32434.c 2006-12-20 17:20:43.000000000 +0100 72 72 @@ -0,0 +1,60 @@ 73 73 +/* … … 133 133 diff -Naurp linux-2.6.19.1/arch/mips/pci/Makefile linux-2.6.19.1.patched/arch/mips/pci/Makefile 134 134 --- linux-2.6.19.1/arch/mips/pci/Makefile 2006-12-11 20:32:53.000000000 +0100 135 +++ linux-2.6.19.1.patched/arch/mips/pci/Makefile 2006-12- 18 22:36:01.000000000 +0100135 +++ linux-2.6.19.1.patched/arch/mips/pci/Makefile 2006-12-20 17:20:43.000000000 +0100 136 136 @@ -53,3 +53,4 @@ obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup- 137 137 obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o … … 141 141 diff -Naurp linux-2.6.19.1/arch/mips/pci/ops-rc32434.c linux-2.6.19.1.patched/arch/mips/pci/ops-rc32434.c 142 142 --- linux-2.6.19.1/arch/mips/pci/ops-rc32434.c 1970-01-01 01:00:00.000000000 +0100 143 +++ linux-2.6.19.1.patched/arch/mips/pci/ops-rc32434.c 2006-12- 18 22:36:01.000000000 +0100144 @@ -0,0 +1,2 02@@143 +++ linux-2.6.19.1.patched/arch/mips/pci/ops-rc32434.c 2006-12-20 19:33:34.000000000 +0100 144 @@ -0,0 +1,216 @@ 145 145 +/************************************************************************** 146 146 + * … … 149 149 + * 150 150 + * Copyright 2004 IDT Inc. (rischelp@idt.com) 151 + * 151 + * Copyright 2006 Felix Fietkau <nbd@openwrt.org> 152 + * 152 153 + * This program is free software; you can redistribute it and/or modify it 153 154 + * under the terms of the GNU General Public License as published by the … … 253 254 +{ 254 255 + int ret; 255 + 256 + int delay = 1; 257 + 258 + /* don't scan too far, else there will be errors with plugged in 259 + * daughterboard (rb564). */ 260 + if (bus->number == 0 && PCI_SLOT(devfn) > 21) 261 + return 0; 262 + 263 +retry: 256 264 + ret = config_access(PCI_ACCESS_READ, bus, devfn, where, val); 257 265 + 258 + /* FIXME: some MiniPCI devices respond delayed, having this 259 + * sleep here gives them time to settle. (It's enough to 260 + * sleep once, as long as it happens before slot 5 is accessed.) 261 + */ 262 + if(PCI_SLOT(devfn) == 0) 263 + msleep(10); 264 + 266 + /* certain devices react delayed at device scan time, this 267 + * gives them time to settle */ 268 + if (where == PCI_VENDOR_ID) { 269 + if (ret == 0xffffffff || ret == 0x00000000 || 270 + ret == 0x0000ffff || ret == 0xffff0000) { 271 + if (delay > 4) 272 + return 0; 273 + delay *= 2; 274 + msleep(delay); 275 + goto retry; 276 + } 277 + } 278 + 265 279 + return ret; 266 280 +} … … 347 361 diff -Naurp linux-2.6.19.1/arch/mips/pci/pci-rc32434.c linux-2.6.19.1.patched/arch/mips/pci/pci-rc32434.c 348 362 --- linux-2.6.19.1/arch/mips/pci/pci-rc32434.c 1970-01-01 01:00:00.000000000 +0100 349 +++ linux-2.6.19.1.patched/arch/mips/pci/pci-rc32434.c 2006-12- 18 22:36:01.000000000 +0100363 +++ linux-2.6.19.1.patched/arch/mips/pci/pci-rc32434.c 2006-12-20 17:20:43.000000000 +0100 350 364 @@ -0,0 +1,226 @@ 351 365 +/************************************************************************** … … 577 591 diff -Naurp linux-2.6.19.1/arch/mips/rb500/devices.c linux-2.6.19.1.patched/arch/mips/rb500/devices.c 578 592 --- linux-2.6.19.1/arch/mips/rb500/devices.c 1970-01-01 01:00:00.000000000 +0100 579 +++ linux-2.6.19.1.patched/arch/mips/rb500/devices.c 2006-12-18 22:36:01.000000000 +0100 580 @@ -0,0 +1,200 @@ 593 +++ linux-2.6.19.1.patched/arch/mips/rb500/devices.c 2006-12-20 17:38:29.000000000 +0100 594 @@ -0,0 +1,209 @@ 595 +/* 596 + * RouterBoard 500 Platform devices 597 + * 598 + * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org> 599 + * 600 + * This program is free software; you can redistribute it and/or modify 601 + * it under the terms of the GNU General Public License as published by 602 + * the Free Software Foundation; either version 2 of the License, or 603 + * (at your option) any later version. 604 + * 605 + * This program is distributed in the hope that it will be useful, 606 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 607 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 608 + * GNU General Public License for more details. 609 + * 610 + */ 581 611 +#include <linux/kernel.h> 582 612 +#include <linux/init.h> … … 772 802 +__setup("kmac=", setup_kmac); 773 803 +arch_initcall(plat_setup_devices); 774 +775 +776 +#if defined(CONFIG_MTD_BLOCK2MTD) && defined(CONFIG_BLK_DEV_CF_MIPS)777 +extern void block2mtd_setup(char *initstr);778 +extern void mount_devfs_fs(void);779 +780 +#endif781 diff -Naurp linux-2.6.19.1/arch/mips/rb500/early_serial.c linux-2.6.19.1.patched/arch/mips/rb500/early_serial.c782 --- linux-2.6.19.1/arch/mips/rb500/early_serial.c 1970-01-01 01:00:00.000000000 +0100783 +++ linux-2.6.19.1.patched/arch/mips/rb500/early_serial.c 2006-12-18 22:36:01.000000000 +0100784 @@ -0,0 +1,198 @@785 +/**************************************************************************786 + *787 + * BRIEF MODULE DESCRIPTION788 + * EB434 specific polling driver for 16550 UART.789 + *790 + * Copyright 2004 IDT Inc. (rischelp@idt.com)791 + *792 + * This program is free software; you can redistribute it and/or modify it793 + * under the terms of the GNU General Public License as published by the794 + * Free Software Foundation; either version 2 of the License, or (at your795 + * option) any later version.796 + *797 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED798 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF799 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN800 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,801 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT802 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF803 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON804 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT805 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF806 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.807 + *808 + * You should have received a copy of the GNU General Public License along809 + * with this program; if not, write to the Free Software Foundation, Inc.,810 + * 675 Mass Ave, Cambridge, MA 02139, USA.811 + *812 + *813 + **************************************************************************814 + * Copyright (C) 2000 by Lineo, Inc.815 + * Written by Quinn Jensen (jensenq@lineo.com)816 + **************************************************************************817 + * P. Sadik Oct 20, 2003818 + *819 + * DIVISOR is made a function of idt_cpu_freq820 + **************************************************************************821 + * P. Sadik Oct 30, 2003822 + *823 + * added reset_cons_port824 + **************************************************************************825 + */826 +827 +#include <linux/serial_reg.h>828 +829 +/* turn this on to watch the debug protocol echoed on the console port */830 +#define DEBUG_REMOTE_DEBUG831 +832 +#define CONS_BAUD 115200833 +834 +extern unsigned int idt_cpu_freq;835 +836 +#define EXT_FREQ 24000000837 +#define INT_FREQ idt_cpu_freq838 +839 +#define EXT_PORT 0xb9800000u840 +#define EXT_SHIFT 0841 +842 +#ifdef __MIPSEB__843 +#define INT_PORT 0xb8058003u844 +#else845 +#define INT_PORT 0xb8058000u846 +#endif847 +#define INT_SHIFT 2848 +849 +#define INT_FCR UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_14850 +#define EXT_FCR UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT851 +852 +typedef struct {853 + volatile unsigned char *base;854 + unsigned int shift;855 + unsigned int freq;856 + unsigned int fcr;857 +} ser_port;858 +859 +ser_port ports[2] = {860 + {(volatile unsigned char *) INT_PORT, INT_SHIFT, 0, INT_FCR},861 + {(volatile unsigned char *) EXT_PORT, EXT_SHIFT, EXT_FREQ, EXT_FCR}862 +};863 +864 +#define CONS_PORT 0865 +866 +void cons_putc(char c);867 +int port_getc(int port);868 +void port_putc(int port, char c);869 +870 +int cons_getc(void)871 +{872 + return port_getc(CONS_PORT);873 +}874 +875 +void cons_putc(char c)876 +{877 + port_putc(CONS_PORT, c);878 +}879 +880 +void cons_puts(char *s)881 +{882 + while (*s) {883 + if (*s == '\n')884 + cons_putc('\r');885 + cons_putc(*s);886 + s++;887 + }888 +}889 +890 +void cons_do_putn(int n)891 +{892 + if (n) {893 + cons_do_putn(n / 10);894 + cons_putc(n % 10 + '0');895 + }896 +}897 +898 +void cons_putn(int n)899 +{900 + if (n < 0) {901 + cons_putc('-');902 + n = -n;903 + }904 +905 + if (n == 0) {906 + cons_putc('0');907 + } else {908 + cons_do_putn(n);909 + }910 +}911 +912 +int port_getc(int p)913 +{914 + volatile unsigned char *port = ports[p].base;915 + int s = ports[p].shift;916 + int c;917 +918 + while ((*(port + (UART_LSR << s)) & UART_LSR_DR) == 0) {919 + continue;920 + }921 +922 + c = *(port + (UART_RX << s));923 +924 + return c;925 +}926 +927 +int port_getc_ready(int p)928 +{929 + volatile unsigned char *port = ports[p].base;930 + int s = ports[p].shift;931 +932 + return *(port + (UART_LSR << s)) & UART_LSR_DR;933 +}934 +935 +#define OK_TO_XMT (UART_LSR_TEMT | UART_LSR_THRE)936 +937 +void port_putc(int p, char c)938 +{939 + volatile unsigned char *port = ports[p].base;940 + int s = ports[p].shift;941 + volatile unsigned char *lsr = port + (UART_LSR << s);942 +943 + while ((*lsr & OK_TO_XMT) != OK_TO_XMT) {944 + continue;945 + }946 +947 + *(port + (UART_TX << s)) = c;948 +}949 +950 +void reset_cons_port(void)951 +{952 + volatile unsigned char *port = ports[CONS_PORT].base;953 + unsigned int s = ports[CONS_PORT].shift;954 + unsigned int DIVISOR;955 +956 + if (ports[CONS_PORT].freq)957 + DIVISOR = (ports[CONS_PORT].freq / 16 / CONS_BAUD);958 + else959 + DIVISOR = (idt_cpu_freq / 16 / CONS_BAUD);960 +961 + /* reset the port */962 + *(port + (UART_CSR << s)) = 0;963 +964 + /* clear and enable the FIFOs */965 + *(port + (UART_FCR << s)) = ports[CONS_PORT].fcr;966 +967 + /* set the baud rate */968 + *(port + (UART_LCR << s)) = UART_LCR_DLAB; /* enable DLL, DLM registers */969 +970 + *(port + (UART_DLL << s)) = DIVISOR;971 + *(port + (UART_DLM << s)) = DIVISOR >> 8;972 + /* set the line control stuff and disable DLL, DLM regs */973 +974 + *(port + (UART_LCR << s)) = UART_LCR_STOP | /* 2 stop bits */975 + UART_LCR_WLEN8; /* 8 bit word length */976 +977 + /* leave interrupts off */978 + *(port + (UART_IER << s)) = 0;979 +980 + /* the modem controls don't leave the chip on this port, so leave them alone */981 + *(port + (UART_MCR << s)) = 0;982 +}983 804 diff -Naurp linux-2.6.19.1/arch/mips/rb500/irq.c linux-2.6.19.1.patched/arch/mips/rb500/irq.c 984 805 --- linux-2.6.19.1/arch/mips/rb500/irq.c 1970-01-01 01:00:00.000000000 +0100 985 +++ linux-2.6.19.1.patched/arch/mips/rb500/irq.c 2006-12- 18 22:36:01.000000000 +0100806 +++ linux-2.6.19.1.patched/arch/mips/rb500/irq.c 2006-12-20 17:20:43.000000000 +0100 986 807 @@ -0,0 +1,270 @@ 987 808 +/* … … 1257 1078 diff -Naurp linux-2.6.19.1/arch/mips/rb500/Makefile linux-2.6.19.1.patched/arch/mips/rb500/Makefile 1258 1079 --- linux-2.6.19.1/arch/mips/rb500/Makefile 1970-01-01 01:00:00.000000000 +0100 1259 +++ linux-2.6.19.1.patched/arch/mips/rb500/Makefile 2006-12- 18 22:36:01.000000000 +01001080 +++ linux-2.6.19.1.patched/arch/mips/rb500/Makefile 2006-12-20 17:49:46.000000000 +0100 1260 1081 @@ -0,0 +1,5 @@ 1261 1082 +# … … 1263 1084 +# 1264 1085 + 1265 +obj-y += irq.o time.o setup.o serial.o early_serial.oprom.o misc.o devices.o1086 +obj-y += irq.o time.o setup.o serial.o prom.o misc.o devices.o 1266 1087 diff -Naurp linux-2.6.19.1/arch/mips/rb500/misc.c linux-2.6.19.1.patched/arch/mips/rb500/misc.c 1267 1088 --- linux-2.6.19.1/arch/mips/rb500/misc.c 1970-01-01 01:00:00.000000000 +0100 1268 +++ linux-2.6.19.1.patched/arch/mips/rb500/misc.c 2006-12-18 22:36:01.000000000 +0100 1269 @@ -0,0 +1,67 @@ 1089 +++ linux-2.6.19.1.patched/arch/mips/rb500/misc.c 2006-12-20 18:53:25.000000000 +0100 1090 @@ -0,0 +1,99 @@ 1091 +/************************************************************************** 1092 + * 1093 + * BRIEF MODULE DESCRIPTION 1094 + * Miscellaneous functions for IDT EB434 board 1095 + * 1096 + * Copyright 2004 IDT Inc. (rischelp@idt.com) 1097 + * Copyright 2006 Phil Sutter <n0-1@freewrt.org> 1098 + * 1099 + * This program is free software; you can redistribute it and/or modify it 1100 + * under the terms of the GNU General Public License as published by the 1101 + * Free Software Foundation; either version 2 of the License, or (at your 1102 + * option) any later version. 1103 + * 1104 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 1105 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 1106 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 1107 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 1108 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 1109 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 1110 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 1111 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 1112 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 1113 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 1114 + * 1115 + * You should have received a copy of the GNU General Public License along 1116 + * with this program; if not, write to the Free Software Foundation, Inc., 1117 + * 675 Mass Ave, Cambridge, MA 02139, USA. 1118 + * 1119 + * 1120 + ************************************************************************** 1121 + */ 1122 + 1270 1123 +#include <linux/module.h> 1271 1124 +#include <linux/kernel.h> /* printk() */ … … 1337 1190 diff -Naurp linux-2.6.19.1/arch/mips/rb500/prom.c linux-2.6.19.1.patched/arch/mips/rb500/prom.c 1338 1191 --- linux-2.6.19.1/arch/mips/rb500/prom.c 1970-01-01 01:00:00.000000000 +0100 1339 +++ linux-2.6.19.1.patched/arch/mips/rb500/prom.c 2006-12- 18 22:36:01.000000000 +01001340 @@ -0,0 +1,1 94@@1192 +++ linux-2.6.19.1.patched/arch/mips/rb500/prom.c 2006-12-20 19:50:31.000000000 +0100 1193 @@ -0,0 +1,172 @@ 1341 1194 +/* 1342 1195 +* prom.c … … 1379 1232 +#define PROM_ENTRY(x) (0xbfc00000+((x)*8)) 1380 1233 +extern void __init setup_serial_port(void); 1381 +extern void cons_putc(char c);1382 +extern void cons_puts(char *s);1383 1234 + 1384 1235 +unsigned int idt_cpu_freq = 132000000; … … 1424 1275 + 1425 1276 +void __init prom_setup_cmdline(void); 1426 +1427 +#ifdef DEBUG_DDR1428 +void cons_puthex4(u32 h)1429 +{1430 + h &= 0x0f;1431 + if (h >= 10)1432 + cons_putc((h - 10) + 'a');1433 + else1434 + cons_putc(h + '0');1435 +}1436 +1437 +void cons_putreg32(u32 reg)1438 +{1439 + char c;1440 + cons_putc('0');1441 + cons_putc('x');1442 + for (c = 28; c >= 0; c -= 4)1443 + cons_puthex4(reg >> c);1444 +}1445 +#endif1446 1277 + 1447 1278 +void __init prom_init(void) … … 1535 1366 diff -Naurp linux-2.6.19.1/arch/mips/rb500/serial.c linux-2.6.19.1.patched/arch/mips/rb500/serial.c 1536 1367 --- linux-2.6.19.1/arch/mips/rb500/serial.c 1970-01-01 01:00:00.000000000 +0100 1537 +++ linux-2.6.19.1.patched/arch/mips/rb500/serial.c 2006-12- 18 22:36:01.000000000 +01001538 @@ -0,0 +1,7 8@@1368 +++ linux-2.6.19.1.patched/arch/mips/rb500/serial.c 2006-12-20 19:51:06.000000000 +0100 1369 @@ -0,0 +1,76 @@ 1539 1370 +/************************************************************************** 1540 1371 + * … … 1608 1439 + serial_req.uartclk = idt_cpu_freq; 1609 1440 + 1610 + if (early_serial_setup(&serial_req)) { 1611 + cons_puts("Serial setup failed!\n"); 1441 + if (early_serial_setup(&serial_req)) 1612 1442 + return -ENODEV; 1613 + }1614 1443 + 1615 1444 + return (0); … … 1617 1446 diff -Naurp linux-2.6.19.1/arch/mips/rb500/setup.c linux-2.6.19.1.patched/arch/mips/rb500/setup.c 1618 1447 --- linux-2.6.19.1/arch/mips/rb500/setup.c 1970-01-01 01:00:00.000000000 +0100 1619 +++ linux-2.6.19.1.patched/arch/mips/rb500/setup.c 2006-12- 18 22:36:01.000000000 +01001448 +++ linux-2.6.19.1.patched/arch/mips/rb500/setup.c 2006-12-20 17:20:43.000000000 +0100 1620 1449 @@ -0,0 +1,83 @@ 1621 1450 +/* … … 1704 1533 diff -Naurp linux-2.6.19.1/arch/mips/rb500/time.c linux-2.6.19.1.patched/arch/mips/rb500/time.c 1705 1534 --- linux-2.6.19.1/arch/mips/rb500/time.c 1970-01-01 01:00:00.000000000 +0100 1706 +++ linux-2.6.19.1.patched/arch/mips/rb500/time.c 2006-12- 18 22:36:01.000000000 +01001707 @@ -0,0 +1,9 2@@1535 +++ linux-2.6.19.1.patched/arch/mips/rb500/time.c 2006-12-20 17:54:42.000000000 +0100 1536 @@ -0,0 +1,91 @@ 1708 1537 +/* 1709 1538 +**************************************************************************** … … 1754 1583 +static unsigned long r4k_offset; /* Amount to incr compare reg each time */ 1755 1584 +static unsigned long r4k_cur; /* What counter should be at next timer irq */ 1756 +extern void ll_timer_interrupt(int irq, struct pt_regs *regs);1757 1585 +extern unsigned int mips_hpt_frequency; 1758 1586 +extern unsigned int idt_cpu_freq; … … 1800 1628 diff -Naurp linux-2.6.19.1/drivers/pci/Makefile linux-2.6.19.1.patched/drivers/pci/Makefile 1801 1629 --- linux-2.6.19.1/drivers/pci/Makefile 2006-12-11 20:32:53.000000000 +0100 1802 +++ linux-2.6.19.1.patched/drivers/pci/Makefile 2006-12- 18 22:36:01.000000000 +01001630 +++ linux-2.6.19.1.patched/drivers/pci/Makefile 2006-12-20 17:20:43.000000000 +0100 1803 1631 @@ -33,6 +33,7 @@ obj-$(CONFIG_PPC64) += setup-bus.o 1804 1632 obj-$(CONFIG_MIPS) += setup-bus.o setup-irq.o … … 1811 1639 diff -Naurp linux-2.6.19.1/include/asm-mips/bootinfo.h linux-2.6.19.1.patched/include/asm-mips/bootinfo.h 1812 1640 --- linux-2.6.19.1/include/asm-mips/bootinfo.h 2006-12-11 20:32:53.000000000 +0100 1813 +++ linux-2.6.19.1.patched/include/asm-mips/bootinfo.h 2006-12-18 22:36:01.000000000 +0100 1814 @@ -23,72 +23,72 @@ 1815 /* 1816 * Valid machtype values for group unknown 1817 */ 1818 -#define MACH_GROUP_UNKNOWN 0 /* whatever... */ 1819 -#define MACH_UNKNOWN 0 /* whatever... */ 1820 +#define MACH_GROUP_UNKNOWN 0 /* whatever... */ 1821 +#define MACH_UNKNOWN 0 /* whatever... */ 1641 +++ linux-2.6.19.1.patched/include/asm-mips/bootinfo.h 2006-12-20 18:00:29.000000000 +0100 1642 @@ -212,6 +212,8 @@ 1643 #define MACH_GROUP_NEC_EMMA2RH 25 /* NEC EMMA2RH (was 23) */ 1644 #define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */ 1822 1645 1823 /* 1824 * Valid machtype values for group JAZZ 1825 */ 1826 -#define MACH_GROUP_JAZZ 1 /* Jazz */ 1827 -#define MACH_ACER_PICA_61 0 /* Acer PICA-61 (PICA1) */ 1828 -#define MACH_MIPS_MAGNUM_4000 1 /* Mips Magnum 4000 "RC4030" */ 1829 +#define MACH_GROUP_JAZZ 1 /* Jazz */ 1830 +#define MACH_ACER_PICA_61 0 /* Acer PICA-61 (PICA1) */ 1831 +#define MACH_MIPS_MAGNUM_4000 1 /* Mips Magnum 4000 "RC4030" */ 1832 #define MACH_OLIVETTI_M700 2 /* Olivetti M700-10 (-15 ??) */ 1833 1834 /* 1835 * Valid machtype for group DEC 1836 */ 1837 -#define MACH_GROUP_DEC 2 /* Digital Equipment */ 1838 +#define MACH_GROUP_DEC 2 /* Digital Equipment */ 1839 #define MACH_DSUNKNOWN 0 1840 -#define MACH_DS23100 1 /* DECstation 2100 or 3100 */ 1841 -#define MACH_DS5100 2 /* DECsystem 5100 */ 1842 -#define MACH_DS5000_200 3 /* DECstation 5000/200 */ 1843 +#define MACH_DS23100 1 /* DECstation 2100 or 3100 */ 1844 +#define MACH_DS5100 2 /* DECsystem 5100 */ 1845 +#define MACH_DS5000_200 3 /* DECstation 5000/200 */ 1846 #define MACH_DS5000_1XX 4 /* DECstation 5000/120, 125, 133, 150 */ 1847 #define MACH_DS5000_XX 5 /* DECstation 5000/20, 25, 33, 50 */ 1848 -#define MACH_DS5000_2X0 6 /* DECstation 5000/240, 260 */ 1849 -#define MACH_DS5400 7 /* DECsystem 5400 */ 1850 -#define MACH_DS5500 8 /* DECsystem 5500 */ 1851 -#define MACH_DS5800 9 /* DECsystem 5800 */ 1852 -#define MACH_DS5900 10 /* DECsystem 5900 */ 1853 +#define MACH_DS5000_2X0 6 /* DECstation 5000/240, 260 */ 1854 +#define MACH_DS5400 7 /* DECsystem 5400 */ 1855 +#define MACH_DS5500 8 /* DECsystem 5500 */ 1856 +#define MACH_DS5800 9 /* DECsystem 5800 */ 1857 +#define MACH_DS5900 10 /* DECsystem 5900 */ 1858 1859 /* 1860 * Valid machtype for group ARC 1861 */ 1862 -#define MACH_GROUP_ARC 3 /* Deskstation */ 1863 +#define MACH_GROUP_ARC 3 /* Deskstation */ 1864 #define MACH_DESKSTATION_RPC44 0 /* Deskstation rPC44 */ 1865 #define MACH_DESKSTATION_TYNE 1 /* Deskstation Tyne */ 1866 1867 /* 1868 * Valid machtype for group SNI_RM 1869 */ 1870 -#define MACH_GROUP_SNI_RM 4 /* Siemens Nixdorf RM series */ 1871 +#define MACH_GROUP_SNI_RM 4 /* Siemens Nixdorf RM series */ 1872 #define MACH_SNI_RM200_PCI 0 /* RM200/RM300/RM400 PCI series */ 1873 1874 /* 1875 * Valid machtype for group ACN 1876 */ 1877 #define MACH_GROUP_ACN 5 1878 -#define MACH_ACN_MIPS_BOARD 0 /* ACN MIPS single board */ 1879 +#define MACH_ACN_MIPS_BOARD 0 /* ACN MIPS single board */ 1880 1881 /* 1882 * Valid machtype for group SGI 1883 */ 1884 -#define MACH_GROUP_SGI 6 /* Silicon Graphics */ 1885 -#define MACH_SGI_IP22 0 /* Indy, Indigo2, Challenge S */ 1886 +#define MACH_GROUP_SGI 6 /* Silicon Graphics */ 1887 +#define MACH_SGI_IP22 0 /* Indy, Indigo2, Challenge S */ 1888 #define MACH_SGI_IP27 1 /* Origin 200, Origin 2000, Onyx 2 */ 1889 -#define MACH_SGI_IP28 2 /* Indigo2 Impact */ 1890 -#define MACH_SGI_IP32 3 /* O2 */ 1891 +#define MACH_SGI_IP28 2 /* Indigo2 Impact */ 1892 +#define MACH_SGI_IP32 3 /* O2 */ 1893 #define MACH_SGI_IP30 4 /* Octane, Octane2 */ 1894 1895 /* 1896 * Valid machtype for group COBALT 1897 */ 1898 -#define MACH_GROUP_COBALT 7 /* Cobalt servers */ 1899 -#define MACH_COBALT_27 0 /* Proto "27" hardware */ 1900 +#define MACH_GROUP_COBALT 7 /* Cobalt servers */ 1901 +#define MACH_COBALT_27 0 /* Proto "27" hardware */ 1902 1903 /* 1904 * Valid machtype for group NEC DDB 1905 */ 1906 -#define MACH_GROUP_NEC_DDB 8 /* NEC DDB */ 1907 +#define MACH_GROUP_NEC_DDB 8 /* NEC DDB */ 1908 #define MACH_NEC_DDB5074 0 /* NEC DDB Vrc-5074 */ 1909 #define MACH_NEC_DDB5476 1 /* NEC DDB Vrc-5476 */ 1910 #define MACH_NEC_DDB5477 2 /* NEC DDB Vrc-5477 */ 1911 @@ -141,7 +141,7 @@ 1912 /* 1913 * Valid machtypes for group Toshiba 1914 */ 1915 -#define MACH_GROUP_TOSHIBA 17 /* Toshiba Reference Systems TSBREF */ 1916 +#define MACH_GROUP_TOSHIBA 17 /* Toshiba Reference Systems TSBREF */ 1917 #define MACH_PALLAS 0 1918 #define MACH_TOPAS 1 1919 #define MACH_JMR 2 1920 @@ -156,19 +156,19 @@ 1921 /* 1922 * Valid machtype for group Alchemy 1923 */ 1924 -#define MACH_GROUP_ALCHEMY 18 /* AMD Alchemy */ 1925 +#define MACH_GROUP_ALCHEMY 18 /* AMD Alchemy */ 1926 #define MACH_PB1000 0 /* Au1000-based eval board */ 1927 #define MACH_PB1100 1 /* Au1100-based eval board */ 1928 #define MACH_PB1500 2 /* Au1500-based eval board */ 1929 -#define MACH_DB1000 3 /* Au1000-based eval board */ 1930 -#define MACH_DB1100 4 /* Au1100-based eval board */ 1931 -#define MACH_DB1500 5 /* Au1500-based eval board */ 1932 -#define MACH_XXS1500 6 /* Au1500-based eval board */ 1933 -#define MACH_MTX1 7 /* 4G MTX-1 Au1500-based board */ 1934 -#define MACH_PB1550 8 /* Au1550-based eval board */ 1935 -#define MACH_DB1550 9 /* Au1550-based eval board */ 1936 -#define MACH_PB1200 10 /* Au1200-based eval board */ 1937 -#define MACH_DB1200 11 /* Au1200-based eval board */ 1938 +#define MACH_DB1000 3 /* Au1000-based eval board */ 1939 +#define MACH_DB1100 4 /* Au1100-based eval board */ 1940 +#define MACH_DB1500 5 /* Au1500-based eval board */ 1941 +#define MACH_XXS1500 6 /* Au1500-based eval board */ 1942 +#define MACH_MTX1 7 /* 4G MTX-1 Au1500-based board */ 1943 +#define MACH_PB1550 8 /* Au1550-based eval board */ 1944 +#define MACH_DB1550 9 /* Au1550-based eval board */ 1945 +#define MACH_PB1200 10 /* Au1200-based eval board */ 1946 +#define MACH_DB1200 11 /* Au1200-based eval board */ 1947 1948 /* 1949 * Valid machtype for group NEC_VR41XX 1950 @@ -189,7 +189,7 @@ 1951 #define MACH_TANBAC_TB0229 7 /* TANBAC TB0229 (VR4131DIMM) */ 1952 #define MACH_NEC_CMBVR4133 8 /* CMB VR4133 Board */ 1953 1954 -#define MACH_GROUP_HP_LJ 20 /* Hewlett Packard LaserJet */ 1955 +#define MACH_GROUP_HP_LJ 20 /* Hewlett Packard LaserJet */ 1956 #define MACH_HP_LASERJET 1 1957 1958 /* 1959 @@ -202,15 +202,17 @@ 1960 /* 1961 * Valid machtype for group TITAN 1962 */ 1963 -#define MACH_GROUP_TITAN 22 /* PMC-Sierra Titan */ 1964 -#define MACH_TITAN_YOSEMITE 1 /* PMC-Sierra Yosemite */ 1965 -#define MACH_TITAN_EXCITE 2 /* Basler eXcite */ 1966 +#define MACH_GROUP_TITAN 22 /* PMC-Sierra Titan */ 1967 +#define MACH_TITAN_YOSEMITE 1 /* PMC-Sierra Yosemite */ 1968 +#define MACH_TITAN_EXCITE 2 /* Basler eXcite */ 1969 1970 /* 1971 * Valid machtype for group NEC EMMA2RH 1972 */ 1973 -#define MACH_GROUP_NEC_EMMA2RH 25 /* NEC EMMA2RH (was 23) */ 1974 -#define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */ 1975 +#define MACH_GROUP_NEC_EMMA2RH 25 /* NEC EMMA2RH (was 23) */ 1976 +#define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */ 1977 + 1978 +#define MACH_GROUP_MIKROTIK 24 /* Mikrotik Boards */ 1979 1646 +#define MACH_GROUP_MIKROTIK 24 /* Mikrotik Boards */ 1647 + 1980 1648 #define CL_SIZE COMMAND_LINE_SIZE 1981 1649 1982 @@ -233,7 +235,7 @@ struct boot_mem_map { 1983 struct boot_mem_map_entry { 1984 phys_t addr; /* start of memory segment */ 1985 phys_t size; /* size of memory segment */ 1986 - long type; /* type of memory segment */ 1987 + long type; /* type of memory segment */ 1988 } map[BOOT_MEM_MAP_MAX]; 1989 }; 1990 1991 @@ -258,4 +260,4 @@ extern unsigned long fw_arg0, fw_arg1, f 1992 */ 1993 extern void plat_mem_setup(void); 1994 1995 -#endif /* _ASM_BOOTINFO_H */ 1996 +#endif /* _ASM_BOOTINFO_H */ 1650 const char *get_system_type(void); 1997 1651 diff -Naurp linux-2.6.19.1/include/asm-mips/cpu.h linux-2.6.19.1.patched/include/asm-mips/cpu.h 1998 1652 --- linux-2.6.19.1/include/asm-mips/cpu.h 2006-12-11 20:32:53.000000000 +0100 1999 +++ linux-2.6.19.1.patched/include/asm-mips/cpu.h 2006-12-18 22:36:01.000000000 +0100 2000 @@ -43,8 +43,8 @@ 2001 #define PRID_IMP_R2000 0x0100 2002 #define PRID_IMP_AU1_REV1 0x0100 2003 #define PRID_IMP_AU1_REV2 0x0200 2004 -#define PRID_IMP_R3000 0x0200 /* Same as R2000A */ 2005 -#define PRID_IMP_R6000 0x0300 /* Same as R3000A */ 2006 +#define PRID_IMP_R3000 0x0200 /* Same as R2000A */ 2007 +#define PRID_IMP_R6000 0x0300 /* Same as R3000A */ 2008 #define PRID_IMP_R4000 0x0400 2009 #define PRID_IMP_R6000A 0x0600 2010 #define PRID_IMP_R10000 0x0900 2011 @@ -58,13 +58,13 @@ 2012 #define PRID_IMP_R4700 0x2100 2013 #define PRID_IMP_TX39 0x2200 2014 #define PRID_IMP_R4640 0x2200 2015 -#define PRID_IMP_R4650 0x2200 /* Same as R4640 */ 2016 +#define PRID_IMP_R4650 0x2200 /* Same as R4640 */ 2017 #define PRID_IMP_R5000 0x2300 2018 #define PRID_IMP_TX49 0x2d00 2019 #define PRID_IMP_SONIC 0x2400 2020 #define PRID_IMP_MAGIC 0x2500 2021 #define PRID_IMP_RM7000 0x2700 2022 -#define PRID_IMP_NEVADA 0x2800 /* RM5260 ??? */ 2023 +#define PRID_IMP_NEVADA 0x2800 /* RM5260 ??? */ 2024 #define PRID_IMP_RM9000 0x3400 2025 #define PRID_IMP_R5432 0x5400 2026 #define PRID_IMP_R5500 0x5500 1653 +++ linux-2.6.19.1.patched/include/asm-mips/cpu.h 2006-12-20 18:03:18.000000000 +0100 2027 1654 @@ -200,7 +200,8 @@ 2028 1655 #define CPU_SB1A 62 … … 2035 1662 /* 2036 1663 * ISA Level encodings 2037 @@ -224,38 +225,38 @@2038 /*2039 * CPU Option encodings2040 */2041 -#define MIPS_CPU_TLB 0x00000001 /* CPU has TLB */2042 -#define MIPS_CPU_4KEX 0x00000002 /* "R4K" exception model */2043 -#define MIPS_CPU_3K_CACHE 0x00000004 /* R3000-style caches */2044 -#define MIPS_CPU_4K_CACHE 0x00000008 /* R4000-style caches */2045 -#define MIPS_CPU_TX39_CACHE 0x00000010 /* TX3900-style caches */2046 -#define MIPS_CPU_SB1_CACHE 0x00000020 /* SB1-style caches */2047 -#define MIPS_CPU_FPU 0x00000040 /* CPU has FPU */2048 -#define MIPS_CPU_32FPR 0x00000080 /* 32 dbl. prec. FP registers */2049 -#define MIPS_CPU_COUNTER 0x00000100 /* Cycle count/compare */2050 -#define MIPS_CPU_WATCH 0x00000200 /* watchpoint registers */2051 -#define MIPS_CPU_DIVEC 0x00000400 /* dedicated interrupt vector */2052 -#define MIPS_CPU_VCE 0x00000800 /* virt. coherence conflict possible */2053 -#define MIPS_CPU_CACHE_CDEX_P 0x00001000 /* Create_Dirty_Exclusive CACHE op */2054 -#define MIPS_CPU_CACHE_CDEX_S 0x00002000 /* ... same for seconary cache ... */2055 -#define MIPS_CPU_MCHECK 0x00004000 /* Machine check exception */2056 -#define MIPS_CPU_EJTAG 0x00008000 /* EJTAG exception */2057 -#define MIPS_CPU_NOFPUEX 0x00010000 /* no FPU exception */2058 -#define MIPS_CPU_LLSC 0x00020000 /* CPU has ll/sc instructions */2059 -#define MIPS_CPU_INCLUSIVE_CACHES 0x00040000 /* P-cache subset enforced */2060 -#define MIPS_CPU_PREFETCH 0x00080000 /* CPU has usable prefetch */2061 -#define MIPS_CPU_VINT 0x00100000 /* CPU supports MIPSR2 vectored interrupts */2062 -#define MIPS_CPU_VEIC 0x00200000 /* CPU supports MIPSR2 external interrupt controller mode */2063 +#define MIPS_CPU_TLB 0x00000001 /* CPU has TLB */2064 +#define MIPS_CPU_4KEX 0x00000002 /* "R4K" exception model */2065 +#define MIPS_CPU_3K_CACHE 0x00000004 /* R3000-style caches */2066 +#define MIPS_CPU_4K_CACHE 0x00000008 /* R4000-style caches */2067 +#define MIPS_CPU_TX39_CACHE 0x00000010 /* TX3900-style caches */2068 +#define MIPS_CPU_SB1_CACHE 0x00000020 /* SB1-style caches */2069 +#define MIPS_CPU_FPU 0x00000040 /* CPU has FPU */2070 +#define MIPS_CPU_32FPR 0x00000080 /* 32 dbl. prec. FP registers */2071 +#define MIPS_CPU_COUNTER 0x00000100 /* Cycle count/compare */2072 +#define MIPS_CPU_WATCH 0x00000200 /* watchpoint registers */2073 +#define MIPS_CPU_DIVEC 0x00000400 /* dedicated interrupt vector */2074 +#define MIPS_CPU_VCE 0x00000800 /* virt. coherence conflict possible */2075 +#define MIPS_CPU_CACHE_CDEX_P 0x00001000 /* Create_Dirty_Exclusive CACHE op */2076 +#define MIPS_CPU_CACHE_CDEX_S 0x00002000 /* ... same for seconary cache ... */2077 +#define MIPS_CPU_MCHECK 0x00004000 /* Machine check exception */2078 +#define MIPS_CPU_EJTAG 0x00008000 /* EJTAG exception */2079 +#define MIPS_CPU_NOFPUEX 0x00010000 /* no FPU exception */2080 +#define MIPS_CPU_LLSC 0x00020000 /* CPU has ll/sc instructions */2081 +#define MIPS_CPU_INCLUSIVE_CACHES 0x00040000 /* P-cache subset enforced */2082 +#define MIPS_CPU_PREFETCH 0x00080000 /* CPU has usable prefetch */2083 +#define MIPS_CPU_VINT 0x00100000 /* CPU supports MIPSR2 vectored interrupts */2084 +#define MIPS_CPU_VEIC 0x00200000 /* CPU supports MIPSR2 external interrupt controller mode */2085 2086 /*2087 * CPU ASE encodings2088 */2089 -#define MIPS_ASE_MIPS16 0x00000001 /* code compression */2090 -#define MIPS_ASE_MDMX 0x00000002 /* MIPS digital media extension */2091 -#define MIPS_ASE_MIPS3D 0x00000004 /* MIPS-3D */2092 -#define MIPS_ASE_SMARTMIPS 0x00000008 /* SmartMIPS */2093 -#define MIPS_ASE_DSP 0x00000010 /* Signal Processing ASE */2094 -#define MIPS_ASE_MIPSMT 0x00000020 /* CPU supports MIPS MT */2095 +#define MIPS_ASE_MIPS16 0x00000001 /* code compression */2096 +#define MIPS_ASE_MDMX 0x00000002 /* MIPS digital media extension */2097 +#define MIPS_ASE_MIPS3D 0x00000004 /* MIPS-3D */2098 +#define MIPS_ASE_SMARTMIPS 0x00000008 /* SmartMIPS */2099 +#define MIPS_ASE_DSP 0x00000010 /* Signal Processing ASE */2100 +#define MIPS_ASE_MIPSMT 0x00000020 /* CPU supports MIPS MT */2101 2102 2103 -#endif /* _ASM_CPU_H */2104 +#endif /* _ASM_CPU_H */2105 1664 diff -Naurp linux-2.6.19.1/include/asm-mips/rc32434/ddr.h linux-2.6.19.1.patched/include/asm-mips/rc32434/ddr.h 2106 1665 --- linux-2.6.19.1/include/asm-mips/rc32434/ddr.h 1970-01-01 01:00:00.000000000 +0100 2107 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/ddr.h 2006-12- 18 22:36:01.000000000 +01002108 @@ -0,0 +1,17 2@@1666 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/ddr.h 2006-12-20 18:58:26.000000000 +0100 1667 @@ -0,0 +1,170 @@ 2109 1668 +#ifndef __IDT_DDR_H__ 2110 1669 +#define __IDT_DDR_H__ … … 2132 1691 + ******************************************************************************/ 2133 1692 + 2134 +#include <asm/rc32434/types.h>2135 +2136 1693 +enum { 2137 1694 + DDR0_PhysicalAddress = 0x18018000, … … 2143 1700 + 2144 1701 +typedef struct DDR_s { 2145 + U32 ddrbase;2146 + U32 ddrmask;2147 + U32 res1;2148 + U32 res2;2149 + U32 ddrc;2150 + U32 ddrabase;2151 + U32 ddramask;2152 + U32 ddramap;2153 + U32 ddrcust;2154 + U32 ddrrdc;2155 + U32 ddrspare;1702 + u32 ddrbase; 1703 + u32 ddrmask; 1704 + u32 res1; 1705 + u32 res2; 1706 + u32 ddrc; 1707 + u32 ddrabase; 1708 + u32 ddramask; 1709 + u32 ddramap; 1710 + u32 ddrcust; 1711 + u32 ddrrdc; 1712 + u32 ddrspare; 2156 1713 +} volatile *DDR_t; 2157 1714 + … … 2281 1838 diff -Naurp linux-2.6.19.1/include/asm-mips/rc32434/dma.h linux-2.6.19.1.patched/include/asm-mips/rc32434/dma.h 2282 1839 --- linux-2.6.19.1/include/asm-mips/rc32434/dma.h 1970-01-01 01:00:00.000000000 +0100 2283 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/dma.h 2006-12- 18 22:36:01.000000000 +01002284 @@ -0,0 +1,1 93@@1840 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/dma.h 2006-12-20 18:17:55.000000000 +0100 1841 @@ -0,0 +1,175 @@ 2285 1842 +#ifndef __IDT_DMA_H__ 2286 1843 +#define __IDT_DMA_H__ … … 2311 1868 + ******************************************************************************/ 2312 1869 + 2313 +#include <asm/rc32434/types.h>2314 1870 +enum { 2315 1871 + DMA0_PhysicalAddress = 0x18040000, … … 2325 1881 + 2326 1882 +typedef struct DMAD_s { 2327 + U32 control; // Control. use DMAD_*2328 + U32 ca; // Current Address.2329 + U32 devcs; // Device control and status.2330 + U32 link; // Next descriptor in chain.1883 + u32 control; // Control. use DMAD_* 1884 + u32 ca; // Current Address. 1885 + u32 devcs; // Device control and status. 1886 + u32 link; // Next descriptor in chain. 2331 1887 +} volatile *DMAD_t; 2332 1888 + … … 2375 1931 + 2376 1932 +struct DMA_Chan_s { 2377 + U32 dmac; // Control.2378 + U32 dmas; // Status.2379 + U32 dmasm; // Mask.2380 + U32 dmadptr; // Descriptor pointer.2381 + U32 dmandptr; // Next descriptor pointer.1933 + u32 dmac; // Control. 1934 + u32 dmas; // Status. 1935 + u32 dmasm; // Mask. 1936 + u32 dmadptr; // Descriptor pointer. 1937 + u32 dmandptr; // Next descriptor pointer. 2382 1938 +}; 2383 1939 + … … 2447 2003 + * External DMA parameters 2448 2004 +*/ 2449 +#if 0 2450 +enum { 2451 + DMADEVCMD_ts_b = 0, // ts field in devcmd 2452 + DMADEVCMD_ts_m = 0x00000007, // ts field in devcmd 2453 + DMADEVCMD_ts_byte_v = 0, 2454 + DMADEVCMD_ts_halfword_v = 1, 2455 + DMADEVCMD_ts_word_v = 2, 2456 + DMADEVCMD_ts_2word_v = 3, 2457 + DMADEVCMD_ts_4word_v = 4, 2458 + DMADEVCMD_ts_6word_v = 5, 2459 + DMADEVCMD_ts_8word_v = 6, 2460 + DMADEVCMD_ts_16word_v = 7 2461 +}; 2462 +#endif 2463 + 2464 +#if 1 // aws - Compatibility. 2465 +# define EXTDMA_ts_b DMADEVCMD_ts_b 2466 +# define EXTDMA_ts_m DMADEVCMD_ts_m 2467 +# define EXTDMA_ts_byte_v DMADEVCMD_ts_byte_v 2468 +# define EXTDMA_ts_halfword_v DMADEVCMD_ts_halfword_v 2469 +# define EXTDMA_ts_word_v DMADEVCMD_ts_word_v 2470 +# define EXTDMA_ts_2word_v DMADEVCMD_ts_2word_v 2471 +# define EXTDMA_ts_4word_v DMADEVCMD_ts_4word_v 2472 +# define EXTDMA_ts_6word_v DMADEVCMD_ts_6word_v 2473 +# define EXTDMA_ts_8word_v DMADEVCMD_ts_8word_v 2474 +# define EXTDMA_ts_16word_v DMADEVCMD_ts_16word_v 2475 +#endif // aws - Compatibility. 2005 +#define EXTDMA_ts_b DMADEVCMD_ts_b 2006 +#define EXTDMA_ts_m DMADEVCMD_ts_m 2007 +#define EXTDMA_ts_byte_v DMADEVCMD_ts_byte_v 2008 +#define EXTDMA_ts_halfword_v DMADEVCMD_ts_halfword_v 2009 +#define EXTDMA_ts_word_v DMADEVCMD_ts_word_v 2010 +#define EXTDMA_ts_2word_v DMADEVCMD_ts_2word_v 2011 +#define EXTDMA_ts_4word_v DMADEVCMD_ts_4word_v 2012 +#define EXTDMA_ts_6word_v DMADEVCMD_ts_6word_v 2013 +#define EXTDMA_ts_8word_v DMADEVCMD_ts_8word_v 2014 +#define EXTDMA_ts_16word_v DMADEVCMD_ts_16word_v 2476 2015 + 2477 2016 +#endif // __IDT_DMA_H__ 2478 2017 diff -Naurp linux-2.6.19.1/include/asm-mips/rc32434/dma_v.h linux-2.6.19.1.patched/include/asm-mips/rc32434/dma_v.h 2479 2018 --- linux-2.6.19.1/include/asm-mips/rc32434/dma_v.h 1970-01-01 01:00:00.000000000 +0100 2480 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/dma_v.h 2006-12- 18 22:36:01.000000000 +01002481 @@ -0,0 +1,6 6@@2019 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/dma_v.h 2006-12-20 18:18:50.000000000 +0100 2020 @@ -0,0 +1,65 @@ 2482 2021 +#ifndef __IDT_DMA_V_H__ 2483 2022 +#define __IDT_DMA_V_H__ … … 2507 2046 + * 2508 2047 + ******************************************************************************/ 2509 +#include <asm/rc32434/types.h>2510 2048 +#include <asm/rc32434/dma.h> 2511 2049 +#include <asm/rc32434/rc32434.h> … … 2548 2086 diff -Naurp linux-2.6.19.1/include/asm-mips/rc32434/eth.h linux-2.6.19.1.patched/include/asm-mips/rc32434/eth.h 2549 2087 --- linux-2.6.19.1/include/asm-mips/rc32434/eth.h 1970-01-01 01:00:00.000000000 +0100 2550 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/eth.h 2006-12- 18 22:36:01.000000000 +01002551 @@ -0,0 +1,31 4@@2088 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/eth.h 2006-12-20 18:23:57.000000000 +0100 2089 @@ -0,0 +1,312 @@ 2552 2090 +#ifndef __IDT_ETH_H__ 2553 2091 +#define __IDT_ETH_H__ … … 2577 2115 + ******************************************************************************/ 2578 2116 + 2579 +#include <asm/rc32434/types.h>2580 +2581 2117 +enum { 2582 2118 + ETH0_PhysicalAddress = 0x18060000, … … 2588 2124 + 2589 2125 +typedef struct { 2590 + U32 ethintfc;2591 + U32 ethfifott;2592 + U32 etharc;2593 + U32 ethhash0;2594 + U32 ethhash1;2595 + U32 ethu0[4]; // Reserved.2596 + U32 ethpfs;2597 + U32 ethmcp;2598 + U32 eth_u1[10]; // Reserved.2599 + U32 ethspare;2600 + U32 eth_u2[42]; // Reserved.2601 + U32 ethsal0;2602 + U32 ethsah0;2603 + U32 ethsal1;2604 + U32 ethsah1;2605 + U32 ethsal2;2606 + U32 ethsah2;2607 + U32 ethsal3;2608 + U32 ethsah3;2609 + U32 ethrbc;2610 + U32 ethrpc;2611 + U32 ethrupc;2612 + U32 ethrfc;2613 + U32 ethtbc;2614 + U32 ethgpf;2615 + U32 eth_u9[50]; // Reserved.2616 + U32 ethmac1;2617 + U32 ethmac2;2618 + U32 ethipgt;2619 + U32 ethipgr;2620 + U32 ethclrt;2621 + U32 ethmaxf;2622 + U32 eth_u10; // Reserved.2623 + U32 ethmtest;2624 + U32 miimcfg;2625 + U32 miimcmd;2626 + U32 miimaddr;2627 + U32 miimwtd;2628 + U32 miimrdd;2629 + U32 miimind;2630 + U32 eth_u11; // Reserved.2631 + U32 eth_u12; // Reserved.2632 + U32 ethcfsa0;2633 + U32 ethcfsa1;2634 + U32 ethcfsa2;2126 + u32 ethintfc; 2127 + u32 ethfifott; 2128 + u32 etharc; 2129 + u32 ethhash0; 2130 + u32 ethhash1; 2131 + u32 ethu0[4]; // Reserved. 2132 + u32 ethpfs; 2133 + u32 ethmcp; 2134 + u32 eth_u1[10]; // Reserved. 2135 + u32 ethspare; 2136 + u32 eth_u2[42]; // Reserved. 2137 + u32 ethsal0; 2138 + u32 ethsah0; 2139 + u32 ethsal1; 2140 + u32 ethsah1; 2141 + u32 ethsal2; 2142 + u32 ethsah2; 2143 + u32 ethsal3; 2144 + u32 ethsah3; 2145 + u32 ethrbc; 2146 + u32 ethrpc; 2147 + u32 ethrupc; 2148 + u32 ethrfc; 2149 + u32 ethtbc; 2150 + u32 ethgpf; 2151 + u32 eth_u9[50]; // Reserved. 2152 + u32 ethmac1; 2153 + u32 ethmac2; 2154 + u32 ethipgt; 2155 + u32 ethipgr; 2156 + u32 ethclrt; 2157 + u32 ethmaxf; 2158 + u32 eth_u10; // Reserved. 2159 + u32 ethmtest; 2160 + u32 miimcfg; 2161 + u32 miimcmd; 2162 + u32 miimaddr; 2163 + u32 miimwtd; 2164 + u32 miimrdd; 2165 + u32 miimind; 2166 + u32 eth_u11; // Reserved. 2167 + u32 eth_u12; // Reserved. 2168 + u32 ethcfsa0; 2169 + u32 ethcfsa1; 2170 + u32 ethcfsa2; 2635 2171 +} volatile *ETH_t; 2636 2172 + … … 2866 2402 diff -Naurp linux-2.6.19.1/include/asm-mips/rc32434/eth_v.h linux-2.6.19.1.patched/include/asm-mips/rc32434/eth_v.h 2867 2403 --- linux-2.6.19.1/include/asm-mips/rc32434/eth_v.h 1970-01-01 01:00:00.000000000 +0100 2868 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/eth_v.h 2006-12- 18 22:36:01.000000000 +01002869 @@ -0,0 +1,5 9@@2404 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/eth_v.h 2006-12-20 18:25:17.000000000 +0100 2405 @@ -0,0 +1,58 @@ 2870 2406 +#ifndef __IDT_ETH_V_H__ 2871 2407 +#define __IDT_ETH_V_H__ … … 2895 2431 + ******************************************************************************/ 2896 2432 + 2897 +#include <asm/rc32434/types.h>2898 2433 +#include <asm/rc32434/eth.h> 2899 2434 + … … 2929 2464 diff -Naurp linux-2.6.19.1/include/asm-mips/rc32434/gpio.h linux-2.6.19.1.patched/include/asm-mips/rc32434/gpio.h 2930 2465 --- linux-2.6.19.1/include/asm-mips/rc32434/gpio.h 1970-01-01 01:00:00.000000000 +0100 2931 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/gpio.h 2006-12- 18 22:36:01.000000000 +01002932 @@ -0,0 +1,17 8@@2466 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/gpio.h 2006-12-20 18:25:48.000000000 +0100 2467 @@ -0,0 +1,177 @@ 2933 2468 +#ifndef __IDT_GPIO_H__ 2934 2469 +#define __IDT_GPIO_H__ … … 2956 2491 + ******************************************************************************/ 2957 2492 + 2958 +#include <asm/rc32434/types.h>2959 2493 +enum { 2960 2494 + GPIO0_PhysicalAddress = 0x18050000, … … 2966 2500 + 2967 2501 +typedef struct { 2968 + U32 gpiofunc; /* GPIO Function Register2502 + u32 gpiofunc; /* GPIO Function Register 2969 2503 + * gpiofunc[x]==0 bit = gpio 2970 2504 + * func[x]==1 bit = altfunc 2971 2505 + */ 2972 + U32 gpiocfg; /* GPIO Configuration Register2506 + u32 gpiocfg; /* GPIO Configuration Register 2973 2507 + * gpiocfg[x]==0 bit = input 2974 2508 + * gpiocfg[x]==1 bit = output 2975 2509 + */ 2976 + U32 gpiod; /* GPIO Data Register2510 + u32 gpiod; /* GPIO Data Register 2977 2511 + * gpiod[x] read/write gpio pinX status 2978 2512 + */ 2979 + U32 gpioilevel; /* GPIO Interrupt Status Register2513 + u32 gpioilevel; /* GPIO Interrupt Status Register 2980 2514 + * interrupt level (see gpioistat) 2981 2515 + */ 2982 + U32 gpioistat; /* Gpio Interrupt Status Register2516 + u32 gpioistat; /* Gpio Interrupt Status Register 2983 2517 + * istat[x] = (gpiod[x] == level[x]) 2984 2518 + * cleared in ISR (STICKY bits) 2985 2519 + */ 2986 + U32 gpionmien; /* GPIO Non-maskable Interrupt Enable Register */2520 + u32 gpionmien; /* GPIO Non-maskable Interrupt Enable Register */ 2987 2521 +} volatile *GPIO_t; 2988 2522 + … … 3111 2645 diff -Naurp linux-2.6.19.1/include/asm-mips/rc32434/irq.h linux-2.6.19.1.patched/include/asm-mips/rc32434/irq.h 3112 2646 --- linux-2.6.19.1/include/asm-mips/rc32434/irq.h 1970-01-01 01:00:00.000000000 +0100 3113 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/irq.h 2006-12- 18 22:36:01.000000000 +01002647 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/irq.h 2006-12-20 17:20:43.000000000 +0100 3114 2648 @@ -0,0 +1,6 @@ 3115 2649 +#ifndef __ASM_MACH_MIPS_IRQ_H … … 3121 2655 diff -Naurp linux-2.6.19.1/include/asm-mips/rc32434/pci.h linux-2.6.19.1.patched/include/asm-mips/rc32434/pci.h 3122 2656 --- linux-2.6.19.1/include/asm-mips/rc32434/pci.h 1970-01-01 01:00:00.000000000 +0100 3123 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/pci.h 2006-12- 18 22:36:01.000000000 +01002657 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/pci.h 2006-12-20 17:20:43.000000000 +0100 3124 2658 @@ -0,0 +1,681 @@ 3125 2659 +/************************************************************************** … … 3806 3340 diff -Naurp linux-2.6.19.1/include/asm-mips/rc32434/rb.h linux-2.6.19.1.patched/include/asm-mips/rc32434/rb.h 3807 3341 --- linux-2.6.19.1/include/asm-mips/rc32434/rb.h 1970-01-01 01:00:00.000000000 +0100 3808 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/rb.h 2006-12-18 22:36:01.000000000 +0100 3809 @@ -0,0 +1,70 @@ 3342 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/rb.h 2006-12-20 18:30:10.000000000 +0100 3343 @@ -0,0 +1,85 @@ 3344 +/* 3345 + * Copyright (C) 2004 IDT Inc. 3346 + * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org> 3347 + * 3348 + * This program is free software; you can redistribute it and/or modify 3349 + * it under the terms of the GNU General Public License as published by 3350 + * the Free Software Foundation; either version 2 of the License, or 3351 + * (at your option) any later version. 3352 + * 3353 + * This program is distributed in the hope that it will be useful, 3354 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 3355 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 3356 + * GNU General Public License for more details. 3357 + * 3358 + */ 3810 3359 +#ifndef __MIPS_RB_H__ 3811 3360 +#define __MIPS_RB_H__ … … 3880 3429 diff -Naurp linux-2.6.19.1/include/asm-mips/rc32434/rc32434.h linux-2.6.19.1.patched/include/asm-mips/rc32434/rc32434.h 3881 3430 --- linux-2.6.19.1/include/asm-mips/rc32434/rc32434.h 1970-01-01 01:00:00.000000000 +0100 3882 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/rc32434.h 2006-12- 18 22:36:01.000000000 +01003883 @@ -0,0 +1,11 9@@3431 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/rc32434.h 2006-12-20 18:32:23.000000000 +0100 3432 @@ -0,0 +1,114 @@ 3884 3433 +/* 3885 3434 + *************************************************************************** … … 3911 3460 +#include <linux/delay.h> 3912 3461 +#include <asm/io.h> 3913 +#include <asm/rc32434/timer.h>3914 3462 + 3915 3463 +#define RC32434_REG_BASE 0x18000000 3916 3464 + 3917 3465 +#define interrupt ((volatile INT_t ) INT0_VirtualAddress) 3918 +#define timer ((volatile TIM_t) TIM0_VirtualAddress)3919 3466 +#define gpio ((volatile GPIO_t) GPIO0_VirtualAddress) 3920 3467 + … … 3997 3544 +} 3998 3545 + 3999 +extern void cons_putc(char c);4000 +extern void cons_puts(char *s);4001 +4002 3546 +#endif /* _RC32434_H_ */ 4003 3547 diff -Naurp linux-2.6.19.1/include/asm-mips/rc32434/timer.h linux-2.6.19.1.patched/include/asm-mips/rc32434/timer.h 4004 3548 --- linux-2.6.19.1/include/asm-mips/rc32434/timer.h 1970-01-01 01:00:00.000000000 +0100 4005 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/timer.h 2006-12- 18 22:36:01.000000000 +01003549 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/timer.h 2006-12-20 17:20:43.000000000 +0100 4006 3550 @@ -0,0 +1,85 @@ 4007 3551 +/************************************************************************** … … 4090 3634 +}; 4091 3635 +#endif // __IDT_TIM_H__ 4092 diff -Naurp linux-2.6.19.1/include/asm-mips/rc32434/types.h linux-2.6.19.1.patched/include/asm-mips/rc32434/types.h4093 --- linux-2.6.19.1/include/asm-mips/rc32434/types.h 1970-01-01 01:00:00.000000000 +01004094 +++ linux-2.6.19.1.patched/include/asm-mips/rc32434/types.h 2006-12-18 22:36:36.000000000 +01004095 @@ -0,0 +1,35 @@4096 +#ifndef __IDT_TYPES_H__4097 +#define __IDT_TYPES_H__4098 +4099 +/*******************************************************************************4100 + *4101 + * Copyright 2002 Integrated Device Technology, Inc.4102 + * All rights reserved.4103 + *4104 + * Common typedefs used in IDT-generated code.4105 + *4106 + * File : $Id: types.h,v 1.1 2002/06/06 16:16:56 astichte Exp $4107 + *4108 + * Author : Allen.Stichter@idt.com4109 + * Date : 200206064110 + * Update :4111 + * $Log: types.h,v $4112 + * Revision 1.1 2002/06/06 16:16:56 astichte4113 + * Added4114 + *4115 + *4116 + ******************************************************************************/4117 +4118 +typedef unsigned char U8;4119 +typedef signed char S8;4120 +4121 +typedef unsigned short U16;4122 +typedef signed short S16;4123 +4124 +typedef unsigned int U32;4125 +typedef signed int S32;4126 +4127 +typedef unsigned long long U64;4128 +typedef signed long long S64;4129 +4130 +#endif // __IDT_TYPES_H__
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