Changeset ba27de8 in freewrt


Ignore:
Timestamp:
Dec 18, 2006, 6:39:15 PM (19 years ago)
Author:
Phil Sutter <n0-1@…>
Children:
2dcc12b
Parents:
61e7c0f
Message:

did some work at this patch:

  • integrated my pci fix
  • removed block2mtd patch, we don't use block2mtd
  • removed half a dozen unused header files
  • somehow some relocation occured...

git-svn-id: ​svn://www.freewrt.org/trunk/freewrt@1309 afb5a338-a214-0410-bd46-81f09a774fd1

File:
1 edited

Legend:

Unmodified
Added
Removed

  • target/linux/rb-2.6/patches/100-rb5xx_support.patch

    r61e7c0f rba27de8  
    11diff -Naurp linux-2.6.18.2/arch/mips/Kconfig linux-2.6.18.2.patched/arch/mips/Kconfig
    2 --- linux-2.6.18.2/arch/mips/Kconfig    2006-12-17 19:48:21.963342382 +0100
    3 +++ linux-2.6.18.2.patched/arch/mips/Kconfig    2006-12-17 18:07:20.037895126 +0100
     2--- linux-2.6.18.2/arch/mips/Kconfig    2006-11-04 02:33:58.000000000 +0100
     3+++ linux-2.6.18.2.patched/arch/mips/Kconfig    2006-12-18 17:16:35.000000000 +0100
    44@@ -782,6 +782,19 @@ config TOSHIBA_JMR3927
    55        select SYS_SUPPORTS_BIG_ENDIAN
    … …  
    3232 
    3333diff -Naurp linux-2.6.18.2/arch/mips/Makefile linux-2.6.18.2.patched/arch/mips/Makefile
    34 --- linux-2.6.18.2/arch/mips/Makefile   2006-12-17 19:48:22.062327334 +0100
    35 +++ linux-2.6.18.2.patched/arch/mips/Makefile   2006-12-17 18:07:20.040894670 +0100
     34--- linux-2.6.18.2/arch/mips/Makefile   2006-11-04 02:33:58.000000000 +0100
     35+++ linux-2.6.18.2.patched/arch/mips/Makefile   2006-12-18 17:16:35.000000000 +0100
    3636@@ -594,6 +594,13 @@ cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iin
    3737 load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
    … …  
    4949 #
    5050diff -Naurp linux-2.6.18.2/arch/mips/mm/tlbex.c linux-2.6.18.2.patched/arch/mips/mm/tlbex.c
    51 --- linux-2.6.18.2/arch/mips/mm/tlbex.c 2006-12-17 19:48:22.107320494 +0100
    52 +++ linux-2.6.18.2.patched/arch/mips/mm/tlbex.c 2006-12-17 18:07:20.071889958 +0100
     51--- linux-2.6.18.2/arch/mips/mm/tlbex.c 2006-11-04 02:33:58.000000000 +0100
     52+++ linux-2.6.18.2.patched/arch/mips/mm/tlbex.c 2006-12-18 17:16:35.000000000 +0100
    5353@@ -872,7 +872,6 @@ static __init void build_tlb_write_entry
    5454        case CPU_R10000:
    … …  
    6767        case CPU_24K:
    6868        case CPU_34K:
    69 diff -Naurp linux-2.6.18.2/arch/mips/pci/Makefile linux-2.6.18.2.patched/arch/mips/pci/Makefile
    70 --- linux-2.6.18.2/arch/mips/pci/Makefile       2006-12-17 19:48:22.138315782 +0100
    71 +++ linux-2.6.18.2.patched/arch/mips/pci/Makefile       2006-12-17 18:53:05.142575782 +0100
    72 @@ -58,3 +58,4 @@ obj-$(CONFIG_TOSHIBA_RBTX4938)        += fixup-
    73  obj-$(CONFIG_VICTOR_MPC30X)    += fixup-mpc30x.o
    74  obj-$(CONFIG_ZAO_CAPCELLA)     += fixup-capcella.o
    75  obj-$(CONFIG_WR_PPMC)          += fixup-wrppmc.o
    76 +obj-$(CONFIG_MIKROTIK_RB500)   += pci-rc32434.o ops-rc32434.o fixup-rc32434.o
    7769diff -Naurp linux-2.6.18.2/arch/mips/pci/fixup-rc32434.c linux-2.6.18.2.patched/arch/mips/pci/fixup-rc32434.c
    7870--- linux-2.6.18.2/arch/mips/pci/fixup-rc32434.c        1970-01-01 01:00:00.000000000 +0100
    79 +++ linux-2.6.18.2.patched/arch/mips/pci/fixup-rc32434.c        2006-12-17 18:30:36.979527718 +0100
     71+++ linux-2.6.18.2.patched/arch/mips/pci/fixup-rc32434.c        2006-12-18 17:16:35.000000000 +0100
    8072@@ -0,0 +1,60 @@
    8173+/*
    … …  
    139131+       return 0;
    140132+}
     133diff -Naurp linux-2.6.18.2/arch/mips/pci/Makefile linux-2.6.18.2.patched/arch/mips/pci/Makefile
     134--- linux-2.6.18.2/arch/mips/pci/Makefile       2006-11-04 02:33:58.000000000 +0100
     135+++ linux-2.6.18.2.patched/arch/mips/pci/Makefile       2006-12-18 17:16:35.000000000 +0100
     136@@ -58,3 +58,4 @@ obj-$(CONFIG_TOSHIBA_RBTX4938)        += fixup-
     137 obj-$(CONFIG_VICTOR_MPC30X)    += fixup-mpc30x.o
     138 obj-$(CONFIG_ZAO_CAPCELLA)     += fixup-capcella.o
     139 obj-$(CONFIG_WR_PPMC)          += fixup-wrppmc.o
     140+obj-$(CONFIG_MIKROTIK_RB500)   += pci-rc32434.o ops-rc32434.o fixup-rc32434.o
    141141diff -Naurp linux-2.6.18.2/arch/mips/pci/ops-rc32434.c linux-2.6.18.2.patched/arch/mips/pci/ops-rc32434.c
    142142--- linux-2.6.18.2/arch/mips/pci/ops-rc32434.c  1970-01-01 01:00:00.000000000 +0100
    143 +++ linux-2.6.18.2.patched/arch/mips/pci/ops-rc32434.c  2006-12-17 18:29:41.197007950 +0100
    144 @@ -0,0 +1,194 @@
     143+++ linux-2.6.18.2.patched/arch/mips/pci/ops-rc32434.c  2006-12-18 17:18:08.000000000 +0100
     144@@ -0,0 +1,202 @@
    145145+/**************************************************************************
    146146+ *
    … …  
    255255+
    256256+       ret = config_access(PCI_ACCESS_READ, bus, devfn, where, val);
     257+
     258+       /* FIXME: some MiniPCI devices respond delayed, having this
     259+        * sleep here gives them time to settle. (It's enough to
     260+        * sleep once, as long as it happens before slot 5 is accessed.)
     261+        */
     262+       if(PCI_SLOT(devfn) == 0)
     263+               msleep(10);
     264+       
    257265+       return ret;
    258266+}
    … …  
    339347diff -Naurp linux-2.6.18.2/arch/mips/pci/pci-rc32434.c linux-2.6.18.2.patched/arch/mips/pci/pci-rc32434.c
    340348--- linux-2.6.18.2/arch/mips/pci/pci-rc32434.c  1970-01-01 01:00:00.000000000 +0100
    341 +++ linux-2.6.18.2.patched/arch/mips/pci/pci-rc32434.c  2006-12-17 18:30:31.773319182 +0100
     349+++ linux-2.6.18.2.patched/arch/mips/pci/pci-rc32434.c  2006-12-18 17:16:35.000000000 +0100
    342350@@ -0,0 +1,226 @@
    343351+/**************************************************************************
    … …  
    567575+
    568576+arch_initcall(rc32434_pci_init);
    569 diff -Naurp linux-2.6.18.2/arch/mips/rb500/Makefile linux-2.6.18.2.patched/arch/mips/rb500/Makefile
    570 --- linux-2.6.18.2/arch/mips/rb500/Makefile     1970-01-01 01:00:00.000000000 +0100
    571 +++ linux-2.6.18.2.patched/arch/mips/rb500/Makefile     2006-12-17 18:07:20.217867766 +0100
    572 @@ -0,0 +1,5 @@
    573 +#
    574 +# Makefile for the RB500 board specific parts of the kernel
    575 +#
    576 +
    577 +obj-y   += irq.o time.o setup.o serial.o early_serial.o prom.o misc.o devices.o
    578577diff -Naurp linux-2.6.18.2/arch/mips/rb500/devices.c linux-2.6.18.2.patched/arch/mips/rb500/devices.c
    579578--- linux-2.6.18.2/arch/mips/rb500/devices.c    1970-01-01 01:00:00.000000000 +0100
    580 +++ linux-2.6.18.2.patched/arch/mips/rb500/devices.c    2006-12-17 18:07:20.244863662 +0100
     579+++ linux-2.6.18.2.patched/arch/mips/rb500/devices.c    2006-12-18 17:16:35.000000000 +0100
    581580@@ -0,0 +1,200 @@
    582581+#include <linux/kernel.h>
    … …  
    782781diff -Naurp linux-2.6.18.2/arch/mips/rb500/early_serial.c linux-2.6.18.2.patched/arch/mips/rb500/early_serial.c
    783782--- linux-2.6.18.2/arch/mips/rb500/early_serial.c       1970-01-01 01:00:00.000000000 +0100
    784 +++ linux-2.6.18.2.patched/arch/mips/rb500/early_serial.c       2006-12-17 18:07:20.273859254 +0100
     783+++ linux-2.6.18.2.patched/arch/mips/rb500/early_serial.c       2006-12-18 17:16:35.000000000 +0100
    785784@@ -0,0 +1,198 @@
    786785+/**************************************************************************
    … …  
    984983diff -Naurp linux-2.6.18.2/arch/mips/rb500/irq.c linux-2.6.18.2.patched/arch/mips/rb500/irq.c
    985984--- linux-2.6.18.2/arch/mips/rb500/irq.c        1970-01-01 01:00:00.000000000 +0100
    986 +++ linux-2.6.18.2.patched/arch/mips/rb500/irq.c        2006-12-17 18:33:34.274574774 +0100
     985+++ linux-2.6.18.2.patched/arch/mips/rb500/irq.c        2006-12-18 17:16:35.000000000 +0100
    987986@@ -0,0 +1,270 @@
    988987+/*
    … …  
    12561255+       }
    12571256+}
     1257diff -Naurp linux-2.6.18.2/arch/mips/rb500/Makefile linux-2.6.18.2.patched/arch/mips/rb500/Makefile
     1258--- linux-2.6.18.2/arch/mips/rb500/Makefile     1970-01-01 01:00:00.000000000 +0100
     1259+++ linux-2.6.18.2.patched/arch/mips/rb500/Makefile     2006-12-18 17:16:35.000000000 +0100
     1260@@ -0,0 +1,5 @@
     1261+#
     1262+# Makefile for the RB500 board specific parts of the kernel
     1263+#
     1264+
     1265+obj-y   += irq.o time.o setup.o serial.o early_serial.o prom.o misc.o devices.o
    12581266diff -Naurp linux-2.6.18.2/arch/mips/rb500/misc.c linux-2.6.18.2.patched/arch/mips/rb500/misc.c
    12591267--- linux-2.6.18.2/arch/mips/rb500/misc.c       1970-01-01 01:00:00.000000000 +0100
    1260 +++ linux-2.6.18.2.patched/arch/mips/rb500/misc.c       2006-12-17 19:52:33.414116054 +0100
     1268+++ linux-2.6.18.2.patched/arch/mips/rb500/misc.c       2006-12-18 17:16:35.000000000 +0100
    12611269@@ -0,0 +1,67 @@
    12621270+#include <linux/module.h>
    … …  
    13291337diff -Naurp linux-2.6.18.2/arch/mips/rb500/prom.c linux-2.6.18.2.patched/arch/mips/rb500/prom.c
    13301338--- linux-2.6.18.2/arch/mips/rb500/prom.c       1970-01-01 01:00:00.000000000 +0100
    1331 +++ linux-2.6.18.2.patched/arch/mips/rb500/prom.c       2006-12-17 18:40:26.520903806 +0100
     1339+++ linux-2.6.18.2.patched/arch/mips/rb500/prom.c       2006-12-18 17:16:35.000000000 +0100
    13321340@@ -0,0 +1,194 @@
    13331341+/*
    … …  
    15271535diff -Naurp linux-2.6.18.2/arch/mips/rb500/serial.c linux-2.6.18.2.patched/arch/mips/rb500/serial.c
    15281536--- linux-2.6.18.2/arch/mips/rb500/serial.c     1970-01-01 01:00:00.000000000 +0100
    1529 +++ linux-2.6.18.2.patched/arch/mips/rb500/serial.c     2006-12-17 18:40:32.886936022 +0100
     1537+++ linux-2.6.18.2.patched/arch/mips/rb500/serial.c     2006-12-18 17:16:35.000000000 +0100
    15301538@@ -0,0 +1,78 @@
    15311539+/**************************************************************************
    … …  
    16091617diff -Naurp linux-2.6.18.2/arch/mips/rb500/setup.c linux-2.6.18.2.patched/arch/mips/rb500/setup.c
    16101618--- linux-2.6.18.2/arch/mips/rb500/setup.c      1970-01-01 01:00:00.000000000 +0100
    1611 +++ linux-2.6.18.2.patched/arch/mips/rb500/setup.c      2006-12-17 18:07:20.419837062 +0100
     1619+++ linux-2.6.18.2.patched/arch/mips/rb500/setup.c      2006-12-18 17:16:35.000000000 +0100
    16121620@@ -0,0 +1,83 @@
    16131621+/*
    … …  
    16961704diff -Naurp linux-2.6.18.2/arch/mips/rb500/time.c linux-2.6.18.2.patched/arch/mips/rb500/time.c
    16971705--- linux-2.6.18.2/arch/mips/rb500/time.c       1970-01-01 01:00:00.000000000 +0100
    1698 +++ linux-2.6.18.2.patched/arch/mips/rb500/time.c       2006-12-17 18:40:39.166981310 +0100
     1706+++ linux-2.6.18.2.patched/arch/mips/rb500/time.c       2006-12-18 17:16:35.000000000 +0100
    16991707@@ -0,0 +1,92 @@
    17001708+/*
    … …  
    17901798+       write_c0_compare(r4k_cur);
    17911799+}
    1792 diff -Naurp linux-2.6.18.2/drivers/mtd/devices/block2mtd.c linux-2.6.18.2.patched/drivers/mtd/devices/block2mtd.c
    1793 --- linux-2.6.18.2/drivers/mtd/devices/block2mtd.c      2006-12-17 19:48:22.159312590 +0100
    1794 +++ linux-2.6.18.2.patched/drivers/mtd/devices/block2mtd.c      2006-12-17 18:07:20.474828702 +0100
    1795 @@ -43,7 +43,7 @@ static LIST_HEAD(blkmtd_device_list);
    1796  #define PAGE_READAHEAD 64
    1797  static void cache_readahead(struct address_space *mapping, int index)
    1798  {
    1799 -       filler_t *filler = (filler_t*)mapping->a_ops->readpage;
    1800 +       filler_t *filler = (filler_t *) mapping->a_ops->readpage;
    1801         int i, pagei;
    1802         unsigned ret = 0;
    1803         unsigned long end_index;
    1804 @@ -86,16 +86,18 @@ static void cache_readahead(struct addre
    1805  }
    1806  
    1807  
    1808 -static struct page* page_readahead(struct address_space *mapping, int index)
    1809 +static struct page *page_readahead(struct address_space *mapping,
    1810 +                                  int index)
    1811  {
    1812 -       filler_t *filler = (filler_t*)mapping->a_ops->readpage;
    1813 +       filler_t *filler = (filler_t *) mapping->a_ops->readpage;
    1814         cache_readahead(mapping, index);
    1815         return read_cache_page(mapping, index, filler, NULL);
    1816  }
    1817  
    1818  
    1819  /* erase a specified part of the device */
    1820 -static int _block2mtd_erase(struct block2mtd_dev *dev, loff_t to, size_t len)
    1821 +static int _block2mtd_erase(struct block2mtd_dev *dev, loff_t to,
    1822 +                           size_t len)
    1823  {
    1824         struct address_space *mapping = dev->blkdev->bd_inode->i_mapping;
    1825         struct page *page;
    1826 @@ -106,16 +108,17 @@ static int _block2mtd_erase(struct block
    1827  
    1828         while (pages) {
    1829                 page = page_readahead(mapping, index);
    1830 -               if (!page)
    1831 +               if (!page || !page_address(page))
    1832                         return -ENOMEM;
    1833                 if (IS_ERR(page))
    1834                         return PTR_ERR(page);
    1835  
    1836 -               max = (u_long*)page_address(page) + PAGE_SIZE;
    1837 -               for (p=(u_long*)page_address(page); p<max; p++)
    1838 +               max = (u_long *) page_address(page) + PAGE_SIZE;
    1839 +               for (p = (u_long *) page_address(page); p < max; p++)
    1840                         if (*p != -1UL) {
    1841                                 lock_page(page);
    1842 -                               memset(page_address(page), 0xff, PAGE_SIZE);
    1843 +                               memset(page_address(page), 0xff,
    1844 +                                      PAGE_SIZE);
    1845                                 set_page_dirty(page);
    1846                                 unlock_page(page);
    1847                                 break;
    1848 @@ -151,12 +154,12 @@ static int block2mtd_erase(struct mtd_in
    1849  
    1850  
    1851  static int block2mtd_read(struct mtd_info *mtd, loff_t from, size_t len,
    1852 -               size_t *retlen, u_char *buf)
    1853 +                         size_t * retlen, u_char * buf)
    1854  {
    1855         struct block2mtd_dev *dev = mtd->priv;
    1856         struct page *page;
    1857         int index = from >> PAGE_SHIFT;
    1858 -       int offset = from & (PAGE_SIZE-1);
    1859 +       int offset = from & (PAGE_SIZE - 1);
    1860         int cpylen;
    1861  
    1862         if (from > mtd->size)
    1863 @@ -175,7 +178,9 @@ static int block2mtd_read(struct mtd_inf
    1864                 len = len - cpylen;
    1865  
    1866                 //      Get page
    1867 -               page = page_readahead(dev->blkdev->bd_inode->i_mapping, index);
    1868 +               page =
    1869 +                   page_readahead(dev->blkdev->bd_inode->i_mapping,
    1870 +                                  index);
    1871                 if (!page)
    1872                         return -ENOMEM;
    1873                 if (IS_ERR(page))
    1874 @@ -195,8 +200,8 @@ static int block2mtd_read(struct mtd_inf
    1875  
    1876  
    1877  /* write data to the underlying device */
    1878 -static int _block2mtd_write(struct block2mtd_dev *dev, const u_char *buf,
    1879 -               loff_t to, size_t len, size_t *retlen)
    1880 +static int _block2mtd_write(struct block2mtd_dev *dev, const u_char * buf,
    1881 +                           loff_t to, size_t len, size_t * retlen)
    1882  {
    1883         struct page *page;
    1884         struct address_space *mapping = dev->blkdev->bd_inode->i_mapping;
    1885 @@ -207,20 +212,20 @@ static int _block2mtd_write(struct block
    1886         if (retlen)
    1887                 *retlen = 0;
    1888         while (len) {
    1889 -               if ((offset+len) > PAGE_SIZE)
    1890 +               if ((offset + len) > PAGE_SIZE)
    1891                         cpylen = PAGE_SIZE - offset;    // multiple pages
    1892                 else
    1893 -                       cpylen = len;                   // this page
    1894 +                       cpylen = len;   // this page
    1895                 len = len - cpylen;
    1896  
    1897 -               //      Get page
    1898 +               //      Get page
    1899                 page = page_readahead(mapping, index);
    1900                 if (!page)
    1901                         return -ENOMEM;
    1902                 if (IS_ERR(page))
    1903                         return PTR_ERR(page);
    1904  
    1905 -               if (memcmp(page_address(page)+offset, buf, cpylen)) {
    1906 +               if (memcmp(page_address(page) + offset, buf, cpylen)) {
    1907                         lock_page(page);
    1908                         memcpy(page_address(page) + offset, buf, cpylen);
    1909                         set_page_dirty(page);
    1910 @@ -240,7 +245,7 @@ static int _block2mtd_write(struct block
    1911  
    1912  
    1913  static int block2mtd_write(struct mtd_info *mtd, loff_t to, size_t len,
    1914 -               size_t *retlen, const u_char *buf)
    1915 +                          size_t * retlen, const u_char * buf)
    1916  {
    1917         struct block2mtd_dev *dev = mtd->priv;
    1918         int err;
    1919 @@ -287,7 +292,8 @@ static void block2mtd_free_device(struct
    1920  
    1921  
    1922  /* FIXME: ensure that mtd->size % erase_size == 0 */
    1923 -static struct block2mtd_dev *add_device(char *devname, int erase_size)
    1924 +static struct block2mtd_dev *add_device(char *devname, int erase_size,
    1925 +                                       char *alias)
    1926  {
    1927         struct block_device *bdev;
    1928         struct block2mtd_dev *dev;
    1929 @@ -310,7 +316,8 @@ static struct block2mtd_dev *add_device(
    1930  
    1931                 dev_t dev = name_to_dev_t(devname);
    1932                 if (dev != 0) {
    1933 -                       bdev = open_by_devnum(dev, FMODE_WRITE | FMODE_READ);
    1934 +                       bdev =
    1935 +                           open_by_devnum(dev, FMODE_WRITE | FMODE_READ);
    1936                 }
    1937         }
    1938  #endif
    1939 @@ -330,14 +337,14 @@ static struct block2mtd_dev *add_device(
    1940  
    1941         /* Setup the MTD structure */
    1942         /* make the name contain the block device in */
    1943 -       dev->mtd.name = kmalloc(sizeof("block2mtd: ") + strlen(devname),
    1944 -                       GFP_KERNEL);
    1945 +       dev->mtd.name = kmalloc(strlen((alias ? : devname)), GFP_KERNEL);
    1946         if (!dev->mtd.name)
    1947                 goto devinit_err;
    1948  
    1949 -       sprintf(dev->mtd.name, "block2mtd: %s", devname);
    1950 +       strcpy(dev->mtd.name, (alias ? : devname));
    1951  
    1952         dev->mtd.size = dev->blkdev->bd_inode->i_size & PAGE_MASK;
    1953 +       dev->mtd.size -= dev->mtd.size % erase_size;
    1954         dev->mtd.erasesize = erase_size;
    1955         dev->mtd.writesize = 1;
    1956         dev->mtd.type = MTD_RAM;
    1957 @@ -356,11 +363,10 @@ static struct block2mtd_dev *add_device(
    1958         }
    1959         list_add(&dev->list, &blkmtd_device_list);
    1960         INFO("mtd%d: [%s] erase_size = %dKiB [%d]", dev->mtd.index,
    1961 -                       dev->mtd.name + strlen("blkmtd: "),
    1962 -                       dev->mtd.erasesize >> 10, dev->mtd.erasesize);
    1963 +            dev->mtd.name, dev->mtd.erasesize >> 10, dev->mtd.erasesize);
    1964         return dev;
    1965  
    1966 -devinit_err:
    1967 +      devinit_err:
    1968         block2mtd_free_device(dev);
    1969         return NULL;
    1970  }
    1971 @@ -376,14 +382,14 @@ static int ustrtoul(const char *cp, char
    1972  {
    1973         unsigned long result = simple_strtoul(cp, endp, base);
    1974         switch (**endp) {
    1975 -       case 'G' :
    1976 +       case 'G':
    1977                 result *= 1024;
    1978         case 'M':
    1979                 result *= 1024;
    1980         case 'K':
    1981         case 'k':
    1982                 result *= 1024;
    1983 -       /* By dwmw2 editorial decree, "ki", "Mi" or "Gi" are to be used. */
    1984 +               /* By dwmw2 editorial decree, "ki", "Mi" or "Gi" are to be used. */
    1985                 if ((*endp)[1] == 'i') {
    1986                         if ((*endp)[2] == 'B')
    1987                                 (*endp) += 3;
    1988 @@ -395,7 +401,7 @@ static int ustrtoul(const char *cp, char
    1989  }
    1990  
    1991  
    1992 -static int parse_num(size_t *num, const char *token)
    1993 +static int parse_num(size_t * num, const char *token)
    1994  {
    1995         char *endp;
    1996         size_t n;
    1997 @@ -424,15 +430,15 @@ static inline void kill_final_newline(ch
    1998  
    1999  #ifndef MODULE
    2000  static int block2mtd_init_called = 0;
    2001 -static __initdata char block2mtd_paramline[80 + 12]; /* 80 for device, 12 for erase size */
    2002 +static __initdata char block2mtd_paramline[80 + 12];   /* 80 for device, 12 for erase size */
    2003  #endif
    2004  
    2005  
    2006  static int block2mtd_setup2(const char *val)
    2007  {
    2008 -       char buf[80 + 12]; /* 80 for device, 12 for erase size */
    2009 +       char buf[80 + 12];      /* 80 for device, 12 for erase size */
    2010         char *str = buf;
    2011 -       char *token[2];
    2012 +       char *token[3];
    2013         char *name;
    2014         size_t erase_size = PAGE_SIZE;
    2015         int i, ret;
    2016 @@ -443,7 +449,7 @@ static int block2mtd_setup2(const char *
    2017         strcpy(str, val);
    2018         kill_final_newline(str);
    2019  
    2020 -       for (i = 0; i < 2; i++)
    2021 +       for (i = 0; i < 3; i++)
    2022                 token[i] = strsep(&str, ",");
    2023  
    2024         if (str)
    2025 @@ -464,13 +470,13 @@ static int block2mtd_setup2(const char *
    2026                 }
    2027         }
    2028  
    2029 -       add_device(name, erase_size);
    2030 +       add_device(name, erase_size, token[2]);
    2031  
    2032         return 0;
    2033  }
    2034  
    2035  
    2036 -static int block2mtd_setup(const char *val, struct kernel_param *kp)
    2037 +int block2mtd_setup(const char *val, struct kernel_param *kp)
    2038  {
    2039  #ifdef MODULE
    2040         return block2mtd_setup2(val);
    2041 @@ -498,7 +504,9 @@ static int block2mtd_setup(const char *v
    2042  
    2043  
    2044  module_param_call(block2mtd, block2mtd_setup, NULL, NULL, 0200);
    2045 -MODULE_PARM_DESC(block2mtd, "Device to use. \"block2mtd=<dev>[,<erasesize>]\"");
    2046 +MODULE_PARM_DESC(block2mtd,
    2047 +                "Device to use. \"block2mtd=<dev>[,<erasesize>]\"");
    2048 +EXPORT_SYMBOL(block2mtd_setup);
    2049  
    2050  static int __init block2mtd_init(void)
    2051  {
    2052 @@ -521,11 +529,12 @@ static void __devexit block2mtd_exit(voi
    2053  
    2054         /* Remove the MTD devices */
    2055         list_for_each_safe(pos, next, &blkmtd_device_list) {
    2056 -               struct block2mtd_dev *dev = list_entry(pos, typeof(*dev), list);
    2057 +               struct block2mtd_dev *dev =
    2058 +                   list_entry(pos, typeof(*dev), list);
    2059                 block2mtd_sync(&dev->mtd);
    2060                 del_mtd_device(&dev->mtd);
    2061                 INFO("mtd%d: [%s] removed", dev->mtd.index,
    2062 -                               dev->mtd.name + strlen("blkmtd: "));
    2063 +                    dev->mtd.name + strlen("blkmtd: "));
    2064                 list_del(&dev->list);
    2065                 block2mtd_free_device(dev);
    2066         }
    20671800diff -Naurp linux-2.6.18.2/drivers/pci/Makefile linux-2.6.18.2.patched/drivers/pci/Makefile
    2068 --- linux-2.6.18.2/drivers/pci/Makefile 2006-12-17 19:48:22.181309246 +0100
    2069 +++ linux-2.6.18.2.patched/drivers/pci/Makefile 2006-12-17 18:07:20.506823838 +0100
     1801--- linux-2.6.18.2/drivers/pci/Makefile 2006-11-04 02:33:58.000000000 +0100
     1802+++ linux-2.6.18.2.patched/drivers/pci/Makefile 2006-12-18 17:16:35.000000000 +0100
    20701803@@ -32,6 +32,7 @@ msiobj-$(CONFIG_IA64_GENERIC) += msi-alt
    20711804 msiobj-$(CONFIG_IA64_SGI_SN2) += msi-altix.o
    … …  
    20771810 #
    20781811diff -Naurp linux-2.6.18.2/include/asm-mips/bootinfo.h linux-2.6.18.2.patched/include/asm-mips/bootinfo.h
    2079 --- linux-2.6.18.2/include/asm-mips/bootinfo.h  2006-12-17 19:48:22.208305142 +0100
    2080 +++ linux-2.6.18.2.patched/include/asm-mips/bootinfo.h  2006-12-17 18:07:20.532819886 +0100
     1812--- linux-2.6.18.2/include/asm-mips/bootinfo.h  2006-11-04 02:33:58.000000000 +0100
     1813+++ linux-2.6.18.2.patched/include/asm-mips/bootinfo.h  2006-12-18 17:16:35.000000000 +0100
    20811814@@ -23,72 +23,72 @@
    20821815 /*
    … …  
    23042037+#endif                         /* _ASM_BOOTINFO_H */
    23052038diff -Naurp linux-2.6.18.2/include/asm-mips/cpu.h linux-2.6.18.2.patched/include/asm-mips/cpu.h
    2306 --- linux-2.6.18.2/include/asm-mips/cpu.h       2006-12-17 19:48:22.222303014 +0100
    2307 +++ linux-2.6.18.2.patched/include/asm-mips/cpu.h       2006-12-17 18:07:20.561815478 +0100
     2039--- linux-2.6.18.2/include/asm-mips/cpu.h       2006-11-04 02:33:58.000000000 +0100
     2040+++ linux-2.6.18.2.patched/include/asm-mips/cpu.h       2006-12-18 17:16:35.000000000 +0100
    23082041@@ -43,8 +43,8 @@
    23092042 #define PRID_IMP_R2000         0x0100
    … …  
    24112144-#endif /* _ASM_CPU_H */
    24122145+#endif                         /* _ASM_CPU_H */
    2413 diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/crom.h linux-2.6.18.2.patched/include/asm-mips/rc32434/crom.h
    2414 --- linux-2.6.18.2/include/asm-mips/rc32434/crom.h      1970-01-01 01:00:00.000000000 +0100
    2415 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/crom.h      2006-12-17 18:07:20.592810766 +0100
    2416 @@ -0,0 +1,94 @@
    2417 +#ifndef __IDT_CROM_H__
    2418 +#define __IDT_CROM_H__
    2419 +
    2420 +/*******************************************************************************
    2421 + *
    2422 + * Copyright 2002 Integrated Device Technology, Inc.
    2423 + *             All rights reserved.
    2424 + *
    2425 + * Configuration ROM register definitions.
    2426 + *
    2427 + * File   : $Id: crom.h,v 1.2 2002/06/06 18:34:03 astichte Exp $
    2428 + *
    2429 + * Author : Allen.Stichter@idt.com
    2430 + * Date   : 20020118
    2431 + * Update :
    2432 + *         $Log: crom.h,v $
    2433 + *         Revision 1.2  2002/06/06 18:34:03  astichte
    2434 + *         Added XXX_PhysicalAddress and XXX_VirtualAddress
    2435 + *     
    2436 + *         Revision 1.1  2002/05/29 17:33:21  sysarch
    2437 + *         jba File moved from vcode/include/idt/acacia
    2438 + *     
    2439 + *
    2440 + ******************************************************************************/
    2441 +
    2442 +#include  <asm/rc32434/types.h>
    2443 +
    2444 +enum {
    2445 +       CROM0_PhysicalAddress = 0x100b8000,
    2446 +       CROM_PhysicalAddress = CROM0_PhysicalAddress,
    2447 +
    2448 +       CROM0_VirtualAddress = 0xb00b8000,
    2449 +       CROM_VirtualAddress = CROM0_VirtualAddress,
    2450 +};
    2451 +
    2452 +typedef struct CROM_s {
    2453 +       U32 cromw0;             // use CROMW0_
    2454 +       U32 cromw1;             // use CROMW1_
    2455 +       U32 cromw2;             // use CROMW2_
    2456 +} volatile *CROM_t;
    2457 +
    2458 +enum {
    2459 +       CROMW0_xloc_b = 0,
    2460 +       CROMW0_xloc_m = 0x0000003f,
    2461 +       CROMW0_yloc_b = 8,
    2462 +       CROMW0_yloc_m = 0x00003f00,
    2463 +       CROMW0_speed_b = 16,
    2464 +       CROMW0_speed_m = 0x01ff0000,
    2465 +       CROMW1_wafer_b = 0,
    2466 +       CROMW1_wafer_m = 0x0000001f,
    2467 +       CROMW1_lot_b = 8,
    2468 +       CROMW1_lot_m = 0x0fffff00,
    2469 +       CROMW1_fab_b = 28,
    2470 +       CROMW1_fab_m = 0xf0000000,
    2471 +       CROMW2_pci_b = 0,
    2472 +       CROMW2_pci_m = 0x00000001,
    2473 +       CROMW2_eth0_b = 1,
    2474 +       CROMW2_eth0_m = 0x00000002,
    2475 +       CROMW2_eth1_b = 2,
    2476 +       CROMW2_eth1_m = 0x00000004 CROMW2_i2c_b = 3,
    2477 +       CROMW2_i2c_m = 0x00000008,
    2478 +       CROMW2_rng_b = 4,
    2479 +       CROMW2_rng_m = 0x00000010,
    2480 +       CROMW2_se_b = 5,
    2481 +       CROMW2_se_m = 0x00000020,
    2482 +       CROMW2_des_b = 6,
    2483 +       CROMW2_des_m = 0x00000040,
    2484 +       CROMW2_tdes_b = 7,
    2485 +       CROMW2_tdes_m = 0x00000080,
    2486 +       CROMW2_a128_b = 8,
    2487 +       CROMW2_a128_m = 0x00000100,
    2488 +       CROMW2_a192_b = 9,
    2489 +       CROMW2_a192_m = 0x00000200,
    2490 +       CROMW2_a256_b = 10,
    2491 +       CROMW2_a256_m = 0x00000400,
    2492 +       CROMW2_md5_b = 11,
    2493 +       CROMW2_md5_m = 0x00000800,
    2494 +       CROMW2_s1_b = 12,
    2495 +       CROMW2_s1_m = 0x00001000,
    2496 +       CROMW2_s256_b = 13,
    2497 +       CROMW2_s256_m = 0x00002000,
    2498 +       CROMW2_pka_b = 14,
    2499 +       CROMW2_pka_m = 0x00004000,
    2500 +       CROMW2_exp_b = 15,
    2501 +       CROMW2_exp_m = 0x00018000,
    2502 +       CROMW2_exp_8192_v = 0,
    2503 +       CROMW2_exp_1536_v = 1,
    2504 +       CROMW2_exp_1024_v = 2,
    2505 +       CROMW2_exp_512_v = 3,
    2506 +       CROMW2_rocfg_b = 17,
    2507 +       CROMW2_rocfg_m = 0x000e0000,
    2508 +};
    2509 +
    2510 +#endif                         // __IDT_CROM_H__
    25112146diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/ddr.h linux-2.6.18.2.patched/include/asm-mips/rc32434/ddr.h
    25122147--- linux-2.6.18.2/include/asm-mips/rc32434/ddr.h       1970-01-01 01:00:00.000000000 +0100
    2513 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/ddr.h       2006-12-17 18:07:20.621806358 +0100
     2148+++ linux-2.6.18.2.patched/include/asm-mips/rc32434/ddr.h       2006-12-18 17:16:35.000000000 +0100
    25142149@@ -0,0 +1,172 @@
    25152150+#ifndef __IDT_DDR_H__
    … …  
    26852320+
    26862321+#endif                         // __IDT_DDR_H__
    2687 diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/dev.h linux-2.6.18.2.patched/include/asm-mips/rc32434/dev.h
    2688 --- linux-2.6.18.2/include/asm-mips/rc32434/dev.h       1970-01-01 01:00:00.000000000 +0100
    2689 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/dev.h       2006-12-17 18:07:20.650801950 +0100
    2690 @@ -0,0 +1,128 @@
    2691 +#ifndef __IDT_DEV_H__
    2692 +#define __IDT_DEV_H__
    2693 +
    2694 +/*******************************************************************************
    2695 + *
    2696 + * Copyright 2002 Integrated Device Technology, Inc.
    2697 + *             All rights reserved.
    2698 + *
    2699 + * Device Controller register definition.
    2700 + *
    2701 + * File   : $Id: dev.h,v 1.2 2002/06/06 18:34:03 astichte Exp $
    2702 + *
    2703 + * Author : John.Ahrens@idt.com
    2704 + * Date   : 200112013
    2705 + * Update :
    2706 + *         $Log: dev.h,v $
    2707 + *         Revision 1.2  2002/06/06 18:34:03  astichte
    2708 + *         Added XXX_PhysicalAddress and XXX_VirtualAddress
    2709 + *     
    2710 + *         Revision 1.1  2002/05/29 17:33:21  sysarch
    2711 + *         jba File moved from vcode/include/idt/acacia
    2712 + *     
    2713 + *
    2714 + ******************************************************************************/
    2715 +
    2716 +#include  <asm/rc32434/types.h>
    2717 +
    2718 +enum {
    2719 +       DEV0_PhysicalAddress = 0x18010000,
    2720 +       DEV_PhysicalAddress = DEV0_PhysicalAddress,     // Default
    2721 +
    2722 +       DEV0_VirtualAddress = 0xb8010000,
    2723 +       DEV_VirtualAddress = DEV0_VirtualAddress,       // Default
    2724 +};
    2725 +
    2726 +typedef struct DEVICE_s {
    2727 +       U32 devbase;            // Device Base
    2728 +       U32 devmask;            // Device Mask
    2729 +       U32 devc;               // Device Control
    2730 +       U32 devtc;              // Device Timing Control
    2731 +} volatile *DEVICE_t;
    2732 +
    2733 +enum {
    2734 +       DEV_Count = 3,
    2735 +};
    2736 +
    2737 +typedef struct DEV_s {
    2738 +       struct DEVICE_s dev[DEV_Count];
    2739 +       U32 btcs;               // Bus timeout control / status
    2740 +       U32 btcompare;          // Compare
    2741 +       U32 btaddr;             // Timeout address.
    2742 +       U32 devdacs;            // Decoupled access control.
    2743 +       U32 devdaa;             // Decoupled access address.
    2744 +       U32 devdad;             // Decoupled access address.
    2745 +       U32 devspare;           // spare.
    2746 +} volatile *DEV_t;
    2747 +
    2748 +enum {
    2749 +       DEVBASE_baseaddr_b = 16,
    2750 +       DEVBASE_baseaddr_m = 0xffff0000,
    2751 +       DEVMASK_mask_b = 16,
    2752 +       DEVMASK_mask_m = 0xffff0000,
    2753 +
    2754 +       DEVC_ds_b = 0,
    2755 +       DEVC_ds_m = 0x00000003,
    2756 +       DEVC_ds_8_v = 0,        // 8-bit device.
    2757 +       DEVC_ds_16_v = 1,       // reserved
    2758 +       DEVC_ds_res_v = 2,      // reserved.
    2759 +       DEVC_ds_res2_v = 3,     // reserved.
    2760 +       DEVC_be_b = 2,
    2761 +       DEVC_be_m = 0x00000004,
    2762 +       DEVC_wp_b = 3,
    2763 +       DEVC_wp_m = 0x00000008,
    2764 +       DEVC_csd_b = 4,
    2765 +       DEVC_csd_m = 0x000000f0,
    2766 +       DEVC_oed_b = 8,
    2767 +       DEVC_oed_m = 0x00000f00,
    2768 +       DEVC_bwd_b = 12,
    2769 +       DEVC_bwd_m = 0x0000f000,
    2770 +       DEVC_rws_b = 16,
    2771 +       DEVC_rws_m = 0x003f0000,
    2772 +       DEVC_wws_b = 22,
    2773 +       DEVC_wws_m = 0x0fc00000,
    2774 +       DEVC_bre_b = 28,
    2775 +       DEVC_bre_m = 0x10000000,
    2776 +       DEVC_bwe_b = 29,
    2777 +       DEVC_bwe_m = 0x20000000,
    2778 +       DEVC_wam_b = 30,
    2779 +       DEVC_wam_m = 0x40000000,
    2780 +
    2781 +       DEVTC_prd_b = 0,
    2782 +       DEVTC_prd_m = 0x0000000f,
    2783 +       DEVTC_pwd_b = 4,
    2784 +       DEVTC_pwd_m = 0x000000f0,
    2785 +       DEVTC_wdh_b = 8,
    2786 +       DEVTC_wdh_m = 0x00000700,
    2787 +       DEVTC_csh_b = 11,
    2788 +       DEVTC_csh_m = 0x00001800,
    2789 +
    2790 +       BTCS_tt_b = 0,
    2791 +       BTCS_tt_m = 0x00000001,
    2792 +       BTCS_tt_write = 0,
    2793 +       BTCS_tt_read = 1,
    2794 +       BTCS_bto_b = 1,         // In btcs
    2795 +       BTCS_bto_m = 0x00000002,        // In btcs
    2796 +       BTCS_bte_b = 2,         // In btcs
    2797 +       BTCS_bte_m = 0x00000004,        // In btcs
    2798 +
    2799 +       BTCOMPARE_compare_b = 0,        // In btcompare
    2800 +       BTCOMPARE_compare_m = 0x0000ffff,       // In btcompare
    2801 +
    2802 +       DEVDACS_op_b = 0,       // In devdacs
    2803 +       DEVDACS_op_m = 0x00000001,      // In devdacs
    2804 +       DEVDACS_op_write_v = 0,
    2805 +       DEVDACS_op_read_v = 1,
    2806 +       DEVDACS_size_b = 1,     // In devdacs
    2807 +       DEVDACS_size_m = 0x00000006,    // In devdacs
    2808 +       DEVDACS_size_byte_v = 0,
    2809 +       DEVDACS_size_halfword = 1,
    2810 +       DEVDACS_size_triplebyte = 2,
    2811 +       DEVDACS_size_word = 3,
    2812 +       DEVDACS_err_b = 3,      // In devdacs
    2813 +       DEVDACS_err_m = 0x00000008,     // In devdacs
    2814 +       DEVDACS_f_b = 4,        // In devdacs
    2815 +       DEVDACS_f_m = 0x00000010,       // In devdacs
    2816 +};
    2817 +
    2818 +#endif                         //__IDT_DEV_H__
    28192322diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/dma.h linux-2.6.18.2.patched/include/asm-mips/rc32434/dma.h
    28202323--- linux-2.6.18.2/include/asm-mips/rc32434/dma.h       1970-01-01 01:00:00.000000000 +0100
    2821 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/dma.h       2006-12-17 18:07:20.676797998 +0100
     2324+++ linux-2.6.18.2.patched/include/asm-mips/rc32434/dma.h       2006-12-18 17:16:35.000000000 +0100
    28222325@@ -0,0 +1,193 @@
    28232326+#ifndef __IDT_DMA_H__
    … …  
    30162519diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/dma_v.h linux-2.6.18.2.patched/include/asm-mips/rc32434/dma_v.h
    30172520--- linux-2.6.18.2/include/asm-mips/rc32434/dma_v.h     1970-01-01 01:00:00.000000000 +0100
    3018 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/dma_v.h     2006-12-17 18:07:20.717791766 +0100
     2521+++ linux-2.6.18.2.patched/include/asm-mips/rc32434/dma_v.h     2006-12-18 17:16:35.000000000 +0100
    30192522@@ -0,0 +1,66 @@
    30202523+#ifndef __IDT_DMA_V_H__
    … …  
    30862589diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/eth.h linux-2.6.18.2.patched/include/asm-mips/rc32434/eth.h
    30872590--- linux-2.6.18.2/include/asm-mips/rc32434/eth.h       1970-01-01 01:00:00.000000000 +0100
    3088 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/eth.h       2006-12-17 18:07:20.748787054 +0100
     2591+++ linux-2.6.18.2.patched/include/asm-mips/rc32434/eth.h       2006-12-18 17:16:35.000000000 +0100
    30892592@@ -0,0 +1,314 @@
    30902593+#ifndef        __IDT_ETH_H__
    … …  
    34042907diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/eth_v.h linux-2.6.18.2.patched/include/asm-mips/rc32434/eth_v.h
    34052908--- linux-2.6.18.2/include/asm-mips/rc32434/eth_v.h     1970-01-01 01:00:00.000000000 +0100
    3406 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/eth_v.h     2006-12-17 18:07:20.780782190 +0100
     2909+++ linux-2.6.18.2.patched/include/asm-mips/rc32434/eth_v.h     2006-12-18 17:16:35.000000000 +0100
    34072910@@ -0,0 +1,59 @@
    34082911+#ifndef        __IDT_ETH_V_H__
    … …  
    34672970diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/gpio.h linux-2.6.18.2.patched/include/asm-mips/rc32434/gpio.h
    34682971--- linux-2.6.18.2/include/asm-mips/rc32434/gpio.h      1970-01-01 01:00:00.000000000 +0100
    3469 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/gpio.h      2006-12-17 18:07:20.806778238 +0100
     2972+++ linux-2.6.18.2.patched/include/asm-mips/rc32434/gpio.h      2006-12-18 17:16:35.000000000 +0100
    34702973@@ -0,0 +1,178 @@
    34712974+#ifndef __IDT_GPIO_H__
    … …  
    36473150+
    36483151+#endif                         // __IDT_GPIO_H__
    3649 diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/i2c.h linux-2.6.18.2.patched/include/asm-mips/rc32434/i2c.h
    3650 --- linux-2.6.18.2/include/asm-mips/rc32434/i2c.h       1970-01-01 01:00:00.000000000 +0100
    3651 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/i2c.h       2006-12-17 18:07:20.823775654 +0100
    3652 @@ -0,0 +1,144 @@
    3653 +#ifndef __IDT_I2C_H__
    3654 +#define __IDT_I2C_H__
    3655 +
    3656 +/*******************************************************************************
    3657 + *
    3658 + * Copyright 2002 Integrated Device Technology, Inc.
    3659 + *             All rights reserved.
    3660 + *
    3661 + * I2C register definitions.
    3662 + *
    3663 + * File   : $Id: i2c.h,v 1.2 2002/06/06 18:34:04 astichte Exp $
    3664 + *
    3665 + * Author : Allen.Stichter@idt.com
    3666 + * Date   : 20020120
    3667 + * Update :
    3668 + *         $Log: i2c.h,v $
    3669 + *         Revision 1.2  2002/06/06 18:34:04  astichte
    3670 + *         Added XXX_PhysicalAddress and XXX_VirtualAddress
    3671 + *     
    3672 + *         Revision 1.1  2002/05/29 17:33:22  sysarch
    3673 + *         jba File moved from vcode/include/idt/acacia
    3674 + *     
    3675 + *
    3676 + ******************************************************************************/
    3677 +
    3678 +#include  <asm/rc32434/types.h>
    3679 +
    3680 +enum {
    3681 +       I2C0_PhysicalAddress = 0x18068000,
    3682 +       I2C_PhysicalAddress = I2C0_PhysicalAddress,
    3683 +
    3684 +       I2C0_VirtualAddress = 0xb8068000,
    3685 +       I2C_VirtualAddress = I2C0_VirtualAddress,
    3686 +};
    3687 +
    3688 +typedef struct {
    3689 +       U32 i2cc;
    3690 +       U32 i2cdi;
    3691 +       U32 i2cdo;
    3692 +       U32 i2ccp;              // I2C clk = ICLK / div / 8
    3693 +       U32 i2cmcmd;
    3694 +       U32 i2cms;
    3695 +       U32 i2cmsm;
    3696 +       U32 i2css;
    3697 +       U32 i2cssm;
    3698 +       U32 i2csaddr;
    3699 +       U32 i2csack;
    3700 +} volatile *I2C_t;
    3701 +enum {
    3702 +       I2CC_men_b = 0,         // In I2C-> i2cc
    3703 +       I2CC_men_m = 0x00000001,
    3704 +       I2CC_sen_b = 1,         // In I2C-> i2cc
    3705 +       I2CC_sen_m = 0x00000002,
    3706 +       I2CC_iom_b = 2,         // In I2C-> i2cc
    3707 +       I2CC_iom_m = 0x00000004,
    3708 +
    3709 +       I2CDI_data_b = 0,       // In I2C-> i2cdi
    3710 +       I2CDI_data_m = 0x000000ff,
    3711 +
    3712 +       I2CDO_data_b = 0,       // In I2C-> i2cdo
    3713 +       I2CDO_data_m = 0x000000ff,
    3714 +
    3715 +       I2CCP_div_b = 0,        // In I2C-> i2ccp
    3716 +       I2CCP_div_m = 0x0000ffff,
    3717 +
    3718 +       I2CMCMD_cmd_b = 0,      // In I2C-> i2cmcmd
    3719 +       I2CMCMD_cmd_m = 0x0000000f,
    3720 +       I2CMCMD_cmd_nop_v = 0,
    3721 +       I2CMCMD_cmd_start_v = 1,
    3722 +       I2CMCMD_cmd_stop_v = 2,
    3723 +       I2CMCMD_cmd_res3_v = 3,
    3724 +       I2CMCMD_cmd_rd_v = 4,
    3725 +       I2CMCMD_cmd_rdack_v = 5,
    3726 +       I2CMCMD_cmd_wd_v = 6,
    3727 +       I2CMCMD_cmd_wdack_v = 7,
    3728 +       I2CMCMD_cmd_res8_v = 8,
    3729 +       I2CMCMD_cmd_res9_v = 9,
    3730 +       I2CMCMD_cmd_res10_v = 10,
    3731 +       I2CMCMD_cmd_res11_v = 11,
    3732 +       I2CMCMD_cmd_res12_v = 12,
    3733 +       I2CMCMD_cmd_res13_v = 13,
    3734 +       I2CMCMD_cmd_res14_v = 14,
    3735 +       I2CMCMD_cmd_res15_v = 15,
    3736 +
    3737 +       I2CMS_d_b = 0,          // In I2C-> i2cms
    3738 +       I2CMS_d_m = 0x00000001,
    3739 +       I2CMS_na_b = 1,         // In I2C-> i2cms
    3740 +       I2CMS_na_m = 0x00000002,
    3741 +       I2CMS_la_b = 2,         // In I2C-> i2cms
    3742 +       I2CMS_la_m = 0x00000004,
    3743 +       I2CMS_err_b = 3,        // In I2C-> i2cms
    3744 +       I2CMS_err_m = 0x00000008,
    3745 +
    3746 +       I2CMSM_d_b = 0,         // In I2C-> i2cmsm
    3747 +       I2CMSM_d_m = 0x00000001,
    3748 +       I2CMSM_na_b = 1,        // In I2C-> i2cmsm
    3749 +       I2CMSM_na_m = 0x00000002,
    3750 +       I2CMSM_la_b = 2,        // In I2C-> i2cmsm
    3751 +       I2CMSM_la_m = 0x00000004,
    3752 +       I2CMSM_err_b = 3,       // In I2C-> i2cmsm
    3753 +       I2CMSM_err_m = 0x00000008,
    3754 +
    3755 +       I2CSS_rr_b = 0,         // In I2C-> i2css
    3756 +       I2CSS_rr_m = 0x00000001,
    3757 +       I2CSS_wr_b = 1,         // In I2C-> i2css
    3758 +       I2CSS_wr_m = 0x00000002,
    3759 +       I2CSS_sa_b = 2,         // In I2C-> i2css
    3760 +       I2CSS_sa_m = 0x00000004,
    3761 +       I2CSS_tf_b = 3,         // In I2C-> i2css
    3762 +       I2CSS_tf_m = 0x00000008,
    3763 +       I2CSS_gc_b = 4,         // In I2C-> i2css
    3764 +       I2CSS_gc_m = 0x00000010,
    3765 +       I2CSS_na_b = 5,         // In I2C-> i2css
    3766 +       I2CSS_na_m = 0x00000020,
    3767 +       I2CSS_err_b = 6,        // In I2C-> i2css
    3768 +       I2CSS_err_m = 0x00000040,
    3769 +
    3770 +       I2CSSM_rr_b = 0,        // In I2C-> i2cssm
    3771 +       I2CSSM_rr_m = 0x00000001,
    3772 +       I2CSSM_wr_b = 1,        // In I2C-> i2cssm
    3773 +       I2CSSM_wr_m = 0x00000002,
    3774 +       I2CSSM_sa_b = 2,        // In I2C-> i2cssm
    3775 +       I2CSSM_sa_m = 0x00000004,
    3776 +       I2CSSM_tf_b = 3,        // In I2C-> i2cssm
    3777 +       I2CSSM_tf_m = 0x00000008,
    3778 +       I2CSSM_gc_b = 4,        // In I2C-> i2cssm
    3779 +       I2CSSM_gc_m = 0x00000010,
    3780 +       I2CSSM_na_b = 5,        // In I2C-> i2cssm
    3781 +       I2CSSM_na_m = 0x00000020,
    3782 +       I2CSSM_err_b = 6,       // In I2C-> i2cssm
    3783 +       I2CSSM_err_m = 0x00000040,
    3784 +
    3785 +       I2CSADDR_addr_b = 0,    // In I2C-> i2csaddr
    3786 +       I2CSADDR_addr_m = 0x000003ff,
    3787 +       I2CSADDR_a_gc_b = 10,   // In I2C-> i2csaddr
    3788 +       I2CSADDR_a_gc_m = 0x00000400,
    3789 +       I2CSADDR_a10_b = 11,    // In I2C-> i2csaddr
    3790 +       I2CSADDR_a10_m = 0x00000800,
    3791 +
    3792 +       I2CSACK_ack_b = 0,      // In I2C-> i2csack
    3793 +       I2CSACK_ack_m = 0x00000001,
    3794 +
    3795 +};
    3796 +#endif                         // __IDT_I2C_H__
    3797 diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/int.h linux-2.6.18.2.patched/include/asm-mips/rc32434/int.h
    3798 --- linux-2.6.18.2/include/asm-mips/rc32434/int.h       1970-01-01 01:00:00.000000000 +0100
    3799 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/int.h       2006-12-17 18:07:20.849771702 +0100
    3800 @@ -0,0 +1,160 @@
    3801 +#ifndef __IDT_INT_H__
    3802 +#define __IDT_INT_H__
    3803 +
    3804 +/*******************************************************************************
    3805 + *
    3806 + * Copyright 2002 Integrated Device Technology, Inc.
    3807 + *             All rights reserved.
    3808 + *
    3809 + * Interrupt Controller register definition.
    3810 + *
    3811 + * File   : $Id: int.h,v 1.3 2002/06/06 18:34:04 astichte Exp $
    3812 + *
    3813 + * Author : ryan.holmqvist@idt.com
    3814 + * Date   : 20011005
    3815 + * Update :
    3816 + *         $Log: int.h,v $
    3817 + *         Revision 1.3  2002/06/06 18:34:04  astichte
    3818 + *         Added XXX_PhysicalAddress and XXX_VirtualAddress
    3819 + *     
    3820 + *         Revision 1.2  2002/06/05 18:47:33  astichte
    3821 + *         Removed IDTField
    3822 + *     
    3823 + *         Revision 1.1  2002/05/29 17:33:22  sysarch
    3824 + *         jba File moved from vcode/include/idt/acacia
    3825 + *
    3826 + *
    3827 + ******************************************************************************/
    3828 +
    3829 +#include  <asm/rc32434/types.h>
    3830 +
    3831 +enum {
    3832 +       INT0_PhysicalAddress = 0x18038000,
    3833 +       INT_PhysicalAddress = INT0_PhysicalAddress,     // Default
    3834 +
    3835 +       INT0_VirtualAddress = 0xb8038000,
    3836 +       INT_VirtualAddress = INT0_VirtualAddress,       // Default
    3837 +};
    3838 +
    3839 +struct INT_s {
    3840 +       U32 ipend;              //Pending interrupts. use INT?_
    3841 +       U32 itest;              //Test bits.            use INT?_
    3842 +       U32 imask;              //Interrupt disabled when set. use INT?_
    3843 +};
    3844 +
    3845 +enum {
    3846 +       IPEND2 = 0,             // HW 2 interrupt to core. use INT2_
    3847 +       IPEND3 = 1,             // HW 3 interrupt to core. use INT3_
    3848 +       IPEND4 = 2,             // HW 4 interrupt to core. use INT4_
    3849 +       IPEND5 = 3,             // HW 5 interrupt to core. use INT5_
    3850 +       IPEND6 = 4,             // HW 6 interrupt to core. use INT6_
    3851 +
    3852 +       IPEND_count,            // must be last (used in loops)
    3853 +       IPEND_min = IPEND2      // min IPEND (used in loops)
    3854 +};
    3855 +
    3856 +typedef struct INTC_s {
    3857 +       struct INT_s i[IPEND_count];    // use i[IPEND?] = INT?_
    3858 +       U32 nmips;              // use NMIPS_
    3859 +} volatile *INT_t;
    3860 +
    3861 +enum {
    3862 +       INT2_timer0_b = 0,
    3863 +       INT2_timer0_m = 0x00000001,
    3864 +       INT2_timer1_b = 1,
    3865 +       INT2_timer1_m = 0x00000002,
    3866 +       INT2_timer2_b = 2,
    3867 +       INT2_timer2_m = 0x00000004,
    3868 +       INT2_refresh_b = 3,
    3869 +       INT2_refresh_m = 0x00000008,
    3870 +       INT2_watchdogTimeout_b = 4,
    3871 +       INT2_watchdogTimeout_m = 0x00000010,
    3872 +       INT2_undecodedCpuWrite_b = 5,
    3873 +       INT2_undecodedCpuWrite_m = 0x00000020,
    3874 +       INT2_undecodedCpuRead_b = 6,
    3875 +       INT2_undecodedCpuRead_m = 0x00000040,
    3876 +       INT2_undecodedPciWrite_b = 7,
    3877 +       INT2_undecodedPciWrite_m = 0x00000080,
    3878 +       INT2_undecodedPciRead_b = 8,
    3879 +       INT2_undecodedPciRead_m = 0x00000100,
    3880 +       INT2_undecodedDmaWrite_b = 9,
    3881 +       INT2_undecodedDmaWrite_m = 0x00000200,
    3882 +       INT2_undecodedDmaRead_b = 10,
    3883 +       INT2_undecodedDmaRead_m = 0x00000400,
    3884 +       INT2_ipBusSlaveAckError_b = 11,
    3885 +       INT2_ipBusSlaveAckError_m = 0x00000800,
    3886 +
    3887 +       INT3_dmaChannel0_b = 0,
    3888 +       INT3_dmaChannel0_m = 0x00000001,
    3889 +       INT3_dmaChannel1_b = 1,
    3890 +       INT3_dmaChannel1_m = 0x00000002,
    3891 +       INT3_dmaChannel2_b = 2,
    3892 +       INT3_dmaChannel2_m = 0x00000004,
    3893 +       INT3_dmaChannel3_b = 3,
    3894 +       INT3_dmaChannel3_m = 0x00000008,
    3895 +       INT3_dmaChannel4_b = 4,
    3896 +       INT3_dmaChannel4_m = 0x00000010,
    3897 +       INT3_dmaChannel5_b = 5,
    3898 +       INT3_dmaChannel5_m = 0x00000020,
    3899 +
    3900 +       INT5_uartGeneral0_b = 0,
    3901 +       INT5_uartGeneral0_m = 0x00000001,
    3902 +       INT5_uartTxrdy0_b = 1,
    3903 +       INT5_uartTxrdy0_m = 0x00000002,
    3904 +       INT5_uartRxrdy0_b = 2,
    3905 +       INT5_uartRxrdy0_m = 0x00000004,
    3906 +       INT5_pci_b = 3,
    3907 +       INT5_pci_m = 0x00000008,
    3908 +       INT5_pciDecoupled_b = 4,
    3909 +       INT5_pciDecoupled_m = 0x00000010,
    3910 +       INT5_spi_b = 5,
    3911 +       INT5_spi_m = 0x00000020,
    3912 +       INT5_deviceDecoupled_b = 6,
    3913 +       INT5_deviceDecoupled_m = 0x00000040,
    3914 +       INT5_i2cMaster_b = 7,
    3915 +       INT5_i2cMaster_m = 0x00000080,
    3916 +       INT5_i2cSlave_b = 8,
    3917 +       INT5_i2cSlave_m = 0x00000100,
    3918 +       INT5_ethOvr_b = 9,
    3919 +       INT5_ethOvr_m = 0x00000200,
    3920 +       INT5_ethUnd_b = 10,
    3921 +       INT5_ethUnd_m = 0x00000400,
    3922 +       INT5_ethPfd_b = 11,
    3923 +       INT5_ethPfd_m = 0x00000800,
    3924 +       INT5_nvram_b = 12,
    3925 +       INT5_nvram_m = 0x00001000,
    3926 +
    3927 +       INT6_gpio0_b = 0,
    3928 +       INT6_gpio0_m = 0x00000001,
    3929 +       INT6_gpio1_b = 1,
    3930 +       INT6_gpio1_m = 0x00000002,
    3931 +       INT6_gpio2_b = 2,
    3932 +       INT6_gpio2_m = 0x00000004,
    3933 +       INT6_gpio3_b = 3,
    3934 +       INT6_gpio3_m = 0x00000008,
    3935 +       INT6_gpio4_b = 4,
    3936 +       INT6_gpio4_m = 0x00000010,
    3937 +       INT6_gpio5_b = 5,
    3938 +       INT6_gpio5_m = 0x00000020,
    3939 +       INT6_gpio6_b = 6,
    3940 +       INT6_gpio6_m = 0x00000040,
    3941 +       INT6_gpio7_b = 7,
    3942 +       INT6_gpio7_m = 0x00000080,
    3943 +       INT6_gpio8_b = 8,
    3944 +       INT6_gpio8_m = 0x00000100,
    3945 +       INT6_gpio9_b = 9,
    3946 +       INT6_gpio9_m = 0x00000200,
    3947 +       INT6_gpio10_b = 10,
    3948 +       INT6_gpio10_m = 0x00000400,
    3949 +       INT6_gpio11_b = 11,
    3950 +       INT6_gpio11_m = 0x00000800,
    3951 +       INT6_gpio12_b = 12,
    3952 +       INT6_gpio12_m = 0x00001000,
    3953 +       INT6_gpio13_b = 13,
    3954 +       INT6_gpio13_m = 0x00002000,
    3955 +
    3956 +       NMIPS_gpio_b = 0,
    3957 +       NMIPS_gpio_m = 0x00000001,
    3958 +};
    3959 +
    3960 +#endif                         // __IDT_INT_H__
    3961 diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/integ.h linux-2.6.18.2.patched/include/asm-mips/rc32434/integ.h
    3962 --- linux-2.6.18.2/include/asm-mips/rc32434/integ.h     1970-01-01 01:00:00.000000000 +0100
    3963 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/integ.h     2006-12-17 18:07:20.866769118 +0100
    3964 @@ -0,0 +1,75 @@
    3965 +#ifndef __IDT_INTEG_H__
    3966 +#define __IDT_INTEG_H__
    3967 +
    3968 +/*******************************************************************************
    3969 + *
    3970 + * Copyright 2002 Integrated Device Technology, Inc.
    3971 + *             All rights reserved.
    3972 + *
    3973 + * System Integrity register definition.
    3974 + *
    3975 + * File   : $Id: integ.h,v 1.3 2002/06/06 18:34:04 astichte Exp $
    3976 + *
    3977 + * Author : ryan.holmQVist@idt.com
    3978 + * Date   : 20011005
    3979 + * Update :
    3980 + *         $Log: integ.h,v $
    3981 + *         Revision 1.3  2002/06/06 18:34:04  astichte
    3982 + *         Added XXX_PhysicalAddress and XXX_VirtualAddress
    3983 + *     
    3984 + *         Revision 1.2  2002/06/05 18:32:33  astichte
    3985 + *         Removed IDTField
    3986 + *     
    3987 + *         Revision 1.1  2002/05/29 17:33:22  sysarch
    3988 + *         jba File moved from vcode/include/idt/acacia
    3989 + *
    3990 + ******************************************************************************/
    3991 +
    3992 +#include  <asm/rc32434/types.h>
    3993 +
    3994 +enum {
    3995 +       INTEG0_PhysicalAddress = 0x18030000,
    3996 +       INTEG_PhysicalAddress = INTEG0_PhysicalAddress, // Default
    3997 +
    3998 +       INTEG0_VirtualAddress = 0xb8030000,
    3999 +       INTEG_VirtualAddress = INTEG0_VirtualAddress,   // Default
    4000 +};
    4001 +
    4002 +// if you are looing for CEA, try rst.h
    4003 +typedef struct {
    4004 +       U32 filler[0xc];        // 0x30 bytes unused.
    4005 +       U32 errcs;              // sticky use ERRCS_
    4006 +       U32 wtcount;            // Watchdog timer count reg.
    4007 +       U32 wtcompare;          // Watchdog timer timeout value.
    4008 +       U32 wtc;                // Watchdog timer control. use WTC_
    4009 +} volatile *INTEG_t;
    4010 +
    4011 +enum {
    4012 +       ERRCS_wto_b = 0,        // In INTEG_t -> errcs
    4013 +       ERRCS_wto_m = 0x00000001,
    4014 +       ERRCS_wne_b = 1,        // In INTEG_t -> errcs
    4015 +       ERRCS_wne_m = 0x00000002,
    4016 +       ERRCS_ucw_b = 2,        // In INTEG_t -> errcs
    4017 +       ERRCS_ucw_m = 0x00000004,
    4018 +       ERRCS_ucr_b = 3,        // In INTEG_t -> errcs
    4019 +       ERRCS_ucr_m = 0x00000008,
    4020 +       ERRCS_upw_b = 4,        // In INTEG_t -> errcs
    4021 +       ERRCS_upw_m = 0x00000010,
    4022 +       ERRCS_upr_b = 5,        // In INTEG_t -> errcs
    4023 +       ERRCS_upr_m = 0x00000020,
    4024 +       ERRCS_udw_b = 6,        // In INTEG_t -> errcs
    4025 +       ERRCS_udw_m = 0x00000040,
    4026 +       ERRCS_udr_b = 7,        // In INTEG_t -> errcs
    4027 +       ERRCS_udr_m = 0x00000080,
    4028 +       ERRCS_sae_b = 8,        // In INTEG_t -> errcs
    4029 +       ERRCS_sae_m = 0x00000100,
    4030 +       ERRCS_wre_b = 9,        // In INTEG_t -> errcs
    4031 +       ERRCS_wre_m = 0x00000200,
    4032 +
    4033 +       WTC_en_b = 0,           // In INTEG_t -> wtc
    4034 +       WTC_en_m = 0x00000001,
    4035 +       WTC_to_b = 1,           // In INTEG_t -> wtc
    4036 +       WTC_to_m = 0x00000002,
    4037 +};
    4038 +
    4039 +#endif                         // __IDT_INTEG_H__
    4040 diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/iparb.h linux-2.6.18.2.patched/include/asm-mips/rc32434/iparb.h
    4041 --- linux-2.6.18.2/include/asm-mips/rc32434/iparb.h     1970-01-01 01:00:00.000000000 +0100
    4042 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/iparb.h     2006-12-17 18:07:20.895764710 +0100
    4043 @@ -0,0 +1,91 @@
    4044 +#ifndef __IDT_IPARB_H__
    4045 +#define __IDT_IPARB_H__
    4046 +
    4047 +/*******************************************************************************
    4048 + *
    4049 + * Copyright 2002 Integrated Device Technology, Inc.
    4050 + *             All rights reserved.
    4051 + *
    4052 + * IP Arbiter register definitions.
    4053 + *
    4054 + * File   : $Id: iparb.h,v 1.3 2002/06/06 18:34:04 astichte Exp $
    4055 + *
    4056 + * Author : Allen.Stichter@idt.com
    4057 + * Date   : 20020120
    4058 + * Update :
    4059 + *         $Log: iparb.h,v $
    4060 + *         Revision 1.3  2002/06/06 18:34:04  astichte
    4061 + *         Added XXX_PhysicalAddress and XXX_VirtualAddress
    4062 + *     
    4063 + *         Revision 1.2  2002/06/05 19:01:42  astichte
    4064 + *         Removed IDTField
    4065 + *     
    4066 + *         Revision 1.1  2002/05/29 17:33:23  sysarch
    4067 + *         jba File moved from vcode/include/idt/acacia
    4068 + *
    4069 + ******************************************************************************/
    4070 +
    4071 +#include  <asm/rc32434/types.h>
    4072 +
    4073 +enum {
    4074 +       IPARB0_PhysicalAddress = 0x18048000,
    4075 +       IPARB_PhysicalAddress = IPARB0_PhysicalAddress, // Default
    4076 +
    4077 +       IPARB0_VirtualAddress = 0xb8048000,
    4078 +       IPARB_VirtualAddress = IPARB0_VirtualAddress,   // Default
    4079 +};
    4080 +
    4081 +enum {
    4082 +       IPABMXC_ethernetReceive = 0,
    4083 +       IPABMXC_ethernetTransmit = 1,
    4084 +       IPABMXC_memoryToHoldFifo = 2,
    4085 +       IPABMXC_holdFifoToMemory = 3,
    4086 +       IPABMXC_pciToMemory = 4,
    4087 +       IPABMXC_memoryToPci = 5,
    4088 +       IPABMXC_pciTarget = 6,
    4089 +       IPABMXC_pciTargetStart = 7,
    4090 +       IPABMXC_cpuToIpBus = 8,
    4091 +
    4092 +       IPABMXC_Count,          // Must be last in list !
    4093 +       IPABMXC_Min = IPABMXC_ethernetReceive,
    4094 +
    4095 +       IPAPXC_PriorityCount = 4,       // 3-highest, 0-lowest.
    4096 +};
    4097 +
    4098 +typedef struct {
    4099 +       U32 ipapc[IPAPXC_PriorityCount];        // ipapc[IPAPXC_] = IPAPC_
    4100 +       U32 ipabmc[IPABMXC_Count];      // ipabmc[IPABMXC_] = IPABMC_
    4101 +       U32 ipac;               // use IPAC_
    4102 +       U32 ipaitcc;            // use IPAITCC_
    4103 +       U32 ipaspare;
    4104 +} volatile *IPARB_t;
    4105 +
    4106 +enum {
    4107 +       IPAC_dwm_b = 2,
    4108 +       IPAC_dwm_m = 0x00000004,
    4109 +       IPAC_drm_b = 3,
    4110 +       IPAC_drm_m = 0x00000008,
    4111 +       IPAC_msk_b = 4,
    4112 +       IPAC_msk_m = 0x00000010,
    4113 +
    4114 +       IPAPC_ptc_b = 0,
    4115 +       IPAPC_ptc_m = 0x00003fff,
    4116 +       IPAPC_mf_b = 14,
    4117 +       IPAPC_mf_m = 0x00004000,
    4118 +       IPAPC_cptc_b = 16,
    4119 +       IPAPC_cptc_m = 0x3fff0000,
    4120 +
    4121 +       IPAITCC_itcc = 0,
    4122 +       IPAITCC_itcc, = 0x000001ff,
    4123 +
    4124 +       IPABMC_mtc_b = 0,
    4125 +       IPABMC_mtc_m = 0x00000fff,
    4126 +       IPABMC_p_b = 12,
    4127 +       IPABMC_p_m = 0x00003000,
    4128 +       IPABMC_msk_b = 14,
    4129 +       IPABMC_msk_m = 0x00004000,
    4130 +       IPABMC_cmtc_b = 16,
    4131 +       IPABMC_cmtc_m = 0x0fff0000,
    4132 +};
    4133 +
    4134 +#endif                         // __IDT_IPARB_H__
    4135 diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/irm.h linux-2.6.18.2.patched/include/asm-mips/rc32434/irm.h
    4136 --- linux-2.6.18.2/include/asm-mips/rc32434/irm.h       1970-01-01 01:00:00.000000000 +0100
    4137 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/irm.h       2006-12-17 18:07:20.924760302 +0100
    4138 @@ -0,0 +1,54 @@
    4139 +#ifndef __IDT_IRM_H__
    4140 +#define __IDT_IRM_H__
    4141 +
    4142 +/*******************************************************************************
    4143 + *
    4144 + * Copyright 2002 Integrated Device Technology, Inc.
    4145 + *             All rights reserved.
    4146 + *
    4147 + * Internal Register Map
    4148 + *
    4149 + * File   : $Id: irm.h,v 1.2 2002/06/05 14:51:06 astichte Exp $
    4150 + *
    4151 + * Author : Allen.Stichter@idt.com
    4152 + * Date   : 20020605
    4153 + * Update :
    4154 + *          $Log: irm.h,v $
    4155 + *          Revision 1.2  2002/06/05 14:51:06  astichte
    4156 + *          *** empty log message ***
    4157 + *
    4158 + *          Revision 1.1  2002/05/29 17:33:23  sysarch
    4159 + *          jba File moved from vcode/include/idt/acacia
    4160 + *
    4161 + ******************************************************************************/
    4162 +
    4163 +/*
    4164 + * NOTE --
    4165 + *     This file is here for backwards compatibility.
    4166 + *     DO NOT USE !!!!
    4167 + */
    4168 +
    4169 +typedef enum {
    4170 +       IRM_Physical = 0x18000000,      // Internal Reg. map physical.
    4171 +       RST_Offset = 0x00000000,        // Includes sysid and RST.
    4172 +       DEV_Offset = 0x00010000,        // Device Controller 0.
    4173 +       DDR_Offset = 0x00018000,        // Double-Data-Rate mem. controller.
    4174 +       PMARB_Offset = 0x00020000,      // PM bus arbiter.
    4175 +       TIM_Offset = 0x00028000,        // Counter / timer.
    4176 +       INTEG_Offset = 0x00030000,      // System Integrity.
    4177 +       INT_Offset = 0x00038000,        // Interrupt controller.
    4178 +       DMA_Offset = 0x00040000,        // DMA.
    4179 +       IPARB_Offset = 0x00044000,      // IP bus arbiter.
    4180 +       GPIO_Offset = 0x00050000,       // GPIO.
    4181 +       UART_Offset = 0x00058000,       // UART
    4182 +       ETH_Offset = 0x00060000,        // Ethernet 1.
    4183 +       I2C_Offset = 0x00068000,        // I2C interface.
    4184 +       SPI_Offset = 0x00070000,        // Serial Peripheral Interface.
    4185 +       NVRAM_Offset = 0x00078000,      // NVRAM interface
    4186 +       AUTH_Offset = 0x0007c000,       // Authorization unit
    4187 +       PCI_Offset = 0x00080000,
    4188 +       CROM_Offset = 0x000b8000,       // Configuration ROM.
    4189 +       IRM_Size = 0x00200000,  // Internal Reg. map size.
    4190 +} IRM_Offset_t;
    4191 +
    4192 +#endif                         // __IDT_IRM_H__
    41933152diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/irq.h linux-2.6.18.2.patched/include/asm-mips/rc32434/irq.h
    41943153--- linux-2.6.18.2/include/asm-mips/rc32434/irq.h       1970-01-01 01:00:00.000000000 +0100
    4195 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/irq.h       2006-12-17 18:41:07.641652502 +0100
     3154+++ linux-2.6.18.2.patched/include/asm-mips/rc32434/irq.h       2006-12-18 17:16:35.000000000 +0100
    41963155@@ -0,0 +1,6 @@
    41973156+#ifndef __ASM_MACH_MIPS_IRQ_H
    … …  
    42013160+
    42023161+#endif                         /* __ASM_MACH_MIPS_IRQ_H */
    4203 diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/nvram.h linux-2.6.18.2.patched/include/asm-mips/rc32434/nvram.h
    4204 --- linux-2.6.18.2/include/asm-mips/rc32434/nvram.h     1970-01-01 01:00:00.000000000 +0100
    4205 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/nvram.h     2006-12-17 18:07:20.983751334 +0100
    4206 @@ -0,0 +1,93 @@
    4207 +#ifndef __IDT_NVRAM_H
    4208 +#define __IDT_NVRAM_H
    4209 +
    4210 +/*******************************************************************************
    4211 + *
    4212 + * Copyright 2002 Integrated Device Technology, Inc.
    4213 + *              All rights reserved.
    4214 + *
    4215 + * IP Arbiter register definitions.
    4216 + *
    4217 + * File   : $Id: nvram.h,v 1.3 2003/07/24 18:34:04 astichte Exp $
    4218 + *
    4219 + * Author : kiran.rao@idt.com
    4220 + * Date   : 20030724
    4221 + * Update :
    4222 + *          $Log: nvram.h,v $
    4223 + *     
    4224 + *
    4225 + ******************************************************************************/
    4226 +#include <asm/rc32434/tpes.h>
    4227 +
    4228 +
    4229 +enum {
    4230 +       NVRAM0_PhysicalAddress = 0xba000000,
    4231 +       NVRAM_PhysicalAddress = NVRAM0_PhysicalAddress, // Default
    4232 +
    4233 +       NVRAM0_VirtualAddress = 0xba000000,
    4234 +       NVRAM_VirtualAddress = NVRAM0_VirtualAddress,   // Default
    4235 +};
    4236 +
    4237 +enum {
    4238 +       NVRCMD_cmd_b = 0,
    4239 +       NVRCMD_cmd_m = 0x0000007f,
    4240 +
    4241 +       NVRS_r_b = 0,
    4242 +       NVRS_r_m = 0x00000001,
    4243 +       NVRS_e_b = 1,
    4244 +       NVRS_e_m = 0x00000002,
    4245 +       NVRS_k_b = 2,
    4246 +       NVRS_k_m = 0x00000004,
    4247 +
    4248 +       NVRSM_r_b = 0,
    4249 +       NVRSM_r_m = 0x00000001,
    4250 +       NVRSM_e_b = 1,
    4251 +       NVRSM_e_m = 0x00000002,
    4252 +       NVRSM_k_b = 2,
    4253 +       NVRSM_k_m = 0x00000004,
    4254 +
    4255 +       NVRCFG0_pwidth_b = 0,
    4256 +       NVRCFG0_pwidth_m = 0x00000003,
    4257 +       NVRCFG0_nmax_b = 2,
    4258 +       NVRCFG0_nmax_m = 0x0000000C,
    4259 +       NVRCFG0_vppl_b = 4,
    4260 +       NVRCFG0_vppl_m = 0x000000f0,
    4261 +       NVRCFG0_vppm_b = 8,
    4262 +       NVRCFG0_vppm_m = 0x00000300,
    4263 +       NVRCFG0_dvpp_b = 10,
    4264 +       NVRCFG0_dvpp_m = 0x00000c00,
    4265 +       NVRCFG0_x_b = 12,
    4266 +       NVRCFG0_x_m = 0x00007000,
    4267 +
    4268 +       NVRCFG1_t1tecc_b = 0,
    4269 +       NVRCFG1_t1tecc_m = 0x00000003,
    4270 +       NVRCFG1_t1mrcl_b = 2,
    4271 +       NVRCFG1_t1mrcl_m = 0x0000000c,
    4272 +       NVRCFG1_t1bias_b = 4,
    4273 +       NVRCFG1_t1bias_m = 0x00000030,
    4274 +       NVRCFG1_t2tecc_b = 6,
    4275 +       NVRCFG1_t2tecc_m = 0x000000c0,
    4276 +       NVRCFG1_t2mrcl_b = 8,
    4277 +       NVRCFG1_t2mrcl_m = 0x00000300,
    4278 +       NVRCFG1_t2bias_b = 10,
    4279 +       NVRCFG1_t2bias_m = 0x00000c00,
    4280 +       NVRCFG1_t3tecc_b = 12,
    4281 +       NVRCFG1_t3tecc_m = 0x00003000,
    4282 +       NVRCFG1_t3mrcl_b = 14,
    4283 +       NVRCFG1_t3mrcl_m = 0x0000c000,
    4284 +       NVRCFG1_t3bias_b = 16,
    4285 +       NVRCFG1_t3bias_m = 0x00030000,
    4286 +       NVRCFG1_t4tecc_b = 18,
    4287 +       NVRCFG1_t4tecc_m = 0x000c0000,
    4288 +       NVRCFG1_t4mrcl_b = 20,
    4289 +       NVRCFG1_t4mrcl_m = 0x00300000,
    4290 +       NVRCFG1_t4bias_b = 22,
    4291 +       NVRCFG1_t4bias_m = 0x00c00000,
    4292 +       NVRCFG1_t5tecc_b = 24,
    4293 +       NVRCFG1_t5tecc_m = 0x03000000,
    4294 +       NVRCFG1_t5mrcl_b = 26,
    4295 +       NVRCFG1_t5mrcl_m = 0x0c000000,
    4296 +       NVRCFG1_t5bias_b = 28,
    4297 +       NVRCFG1_t5bias_m = 0x30000000,
    4298 +}
    4299 +#endif                         // __IDT_NVRAM_H__
    43003162diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/pci.h linux-2.6.18.2.patched/include/asm-mips/rc32434/pci.h
    43013163--- linux-2.6.18.2/include/asm-mips/rc32434/pci.h       1970-01-01 01:00:00.000000000 +0100
    4302 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/pci.h       2006-12-17 18:07:21.010747230 +0100
     3164+++ linux-2.6.18.2.patched/include/asm-mips/rc32434/pci.h       2006-12-18 17:16:35.000000000 +0100
    43033165@@ -0,0 +1,681 @@
    43043166+/**************************************************************************
    … …  
    49833845+
    49843846+#endif                         // __IDT_PCI_H__
    4985 diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/pci_regs.h linux-2.6.18.2.patched/include/asm-mips/rc32434/pci_regs.h
    4986 --- linux-2.6.18.2/include/asm-mips/rc32434/pci_regs.h  1970-01-01 01:00:00.000000000 +0100
    4987 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/pci_regs.h  2006-12-17 18:07:21.041742518 +0100
    4988 @@ -0,0 +1,7 @@
    4989 +/* Override the default address space for this arch
    4990 +*/
    4991 +
    4992 +#include <linux/pci_regs.h>
    4993 +
    4994 +//#undef PCI_BASE_ADDRESS_SPACE
    4995 +//#define PCI_BASE_ADDRESS_SPACE PCI_BASE_ADDRESS_SPACE_MEMORY
    49963847diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/rb.h linux-2.6.18.2.patched/include/asm-mips/rc32434/rb.h
    49973848--- linux-2.6.18.2/include/asm-mips/rc32434/rb.h        1970-01-01 01:00:00.000000000 +0100
    4998 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/rb.h        2006-12-17 18:07:21.099733702 +0100
     3849+++ linux-2.6.18.2.patched/include/asm-mips/rc32434/rb.h        2006-12-18 17:16:35.000000000 +0100
    49993850@@ -0,0 +1,70 @@
    50003851+#ifndef __MIPS_RB_H__
    … …  
    50703921diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/rc32434.h linux-2.6.18.2.patched/include/asm-mips/rc32434/rc32434.h
    50713922--- linux-2.6.18.2/include/asm-mips/rc32434/rc32434.h   1970-01-01 01:00:00.000000000 +0100
    5072 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/rc32434.h   2006-12-17 18:41:47.009667654 +0100
     3923+++ linux-2.6.18.2.patched/include/asm-mips/rc32434/rc32434.h   2006-12-18 17:16:35.000000000 +0100
    50733924@@ -0,0 +1,119 @@
    50743925+/*
    … …  
    51914042+
    51924043+#endif                         /* _RC32434_H_ */
    5193 diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/rst.h linux-2.6.18.2.patched/include/asm-mips/rc32434/rst.h
    5194 --- linux-2.6.18.2/include/asm-mips/rc32434/rst.h       1970-01-01 01:00:00.000000000 +0100
    5195 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/rst.h       2006-12-17 18:07:21.156725038 +0100
    5196 @@ -0,0 +1,102 @@
    5197 +#ifndef __IDT_RST_H__
    5198 +#define __IDT_RST_H__
    5199 +
    5200 +/*******************************************************************************
    5201 + *
    5202 + * Copyright 2002 Integrated Device Technology, Inc.
    5203 + *             All rights reserved.
    5204 + *
    5205 + * Reset register definitions.
    5206 + *
    5207 + * File   : $Id: rst.h,v 1.2 2002/06/06 18:34:05 astichte Exp $
    5208 + *
    5209 + * Author : Allen.Stichter@idt.com
    5210 + * Date   : 20020118
    5211 + * Update :
    5212 + *         $Log: rst.h,v $
    5213 + *         Revision 1.2  2002/06/06 18:34:05  astichte
    5214 + *         Added XXX_PhysicalAddress and XXX_VirtualAddress
    5215 + *     
    5216 + *         Revision 1.1  2002/05/29 17:33:24  sysarch
    5217 + *         jba File moved from vcode/include/idt/acacia
    5218 + *     
    5219 + *
    5220 + ******************************************************************************/
    5221 +
    5222 +#include  <asm/rc32434/types.h>
    5223 +
    5224 +enum {
    5225 +       RST0_PhysicalAddress = 0x18000000,
    5226 +       RST_PhysicalAddress = RST0_PhysicalAddress,     // Default
    5227 +
    5228 +       RST0_VirtualAddress = 0xb8000000,
    5229 +       RST_VirtualAddress = RST0_VirtualAddress,       // Default
    5230 +};
    5231 +
    5232 +typedef struct RST_s {
    5233 +       U32 filler[0x0006];
    5234 +       U32 sysid;
    5235 +       U32 filler2[0x2000 - 8];        // Pad out to offset 0x8000
    5236 +       U32 reset;
    5237 +       U32 bcv;
    5238 +       U32 cea;
    5239 +} volatile *RST_t;
    5240 +
    5241 +enum {
    5242 +       SYSID_rev_b = 0,
    5243 +       SYSID_rev_m = 0x000000ff,
    5244 +       SYSID_imp_b = 8,
    5245 +       SYSID_imp_m = 0x000fff00,
    5246 +       SYSID_vendor_b = 20,
    5247 +       SYSID_vendor_m = 0xfff00000,
    5248 +
    5249 +       BCV_pll_b = 0,
    5250 +       BCV_pll_m = 0x0000000f,
    5251 +       BCV_pll_PLLBypass_v = 0x0,      // PCLK=1*CLK.
    5252 +       BCV_pll_Mul3_v = 0x1,   // PCLK=3*CLK.
    5253 +       BCV_pll_Mul4_v = 0x2,   // PCLK=4*CLK.
    5254 +       BCV_pll_SlowMul5_v = 0x3,       // PCLK=4*CLK.
    5255 +       BCV_pll_Mul5_v = 0x4,   // PCLK=6*CLK.
    5256 +       BCV_pll_SlowMul6_v = 0x5,       // PCLK=8*CLK.
    5257 +       BCV_pll_Mul6_v = 0x6,   // PCLK=8*CLK.
    5258 +       BCV_pll_Mul8_v = 0x7,   // PCLK=8*CLK.
    5259 +       BCV_pll_Mul10_v = 0x8,  // PCLK=8*CLK.
    5260 +       BCV_pll_Res5_v = 0x9,
    5261 +       BCV_pll_Res6_v = 0xa,
    5262 +       BCV_pll_Res7_v = 0xb,
    5263 +       BCV_pll_Res8_v = 0xc,
    5264 +       BCV_pll_Res13_v = 0xd,
    5265 +       BCV_pll_Res14_v = 0xe,
    5266 +       BCV_pll_Res15_v = 0xf,
    5267 +       BCV_clkDiv_b = 4,
    5268 +       BCV_clkDiv_m = 0x00000030,
    5269 +       BCV_clkDiv_Div1_v = 0x0,
    5270 +       BCV_clkDiv_Div2_v = 0x1,
    5271 +       BCV_clkDiv_Div4_v = 0x2,
    5272 +       BCV_clkDiv_Res3_v = 0x3,
    5273 +       BCV_bigEndian_b = 6,
    5274 +       BCV_bigEndian_m = 0x00000040,
    5275 +       BCV_resetFast_b = 7,
    5276 +       BCV_resetFast_m = 0x00000080,
    5277 +       BCV_pciMode_b = 8,
    5278 +       BCV_pciMode_m = 0x00000100,
    5279 +       BCV_pciMode_disabled_v = 0,     // PCI is disabled.
    5280 +       BCV_pciMode_tnr_v = 1,  // satellite Target Not Ready.
    5281 +       BCV_pciMode_suspended_v = 2,    // satellite with suspended CPU.
    5282 +       BCV_pciMode_external_v = 3,     // host, external arbiter.
    5283 +       BCV_pciMode_fixed_v = 4,        // host, fixed priority arbiter.
    5284 +       BCV_pciMode_roundRobin_v = 5,   // host, round robin arbiter.
    5285 +       BCV_pciMode_res6_v = 6,
    5286 +       BCV_pciMode_res7_v = 7,
    5287 +       BCV_watchDisable_b = 11,
    5288 +       BCV_watchDisable_m = 0x00000800,
    5289 +       BCV_pllTest_b = 12,
    5290 +       BCV_pllTest_m = 0x00001000,
    5291 +       BCV_nvramInit_b = 13,
    5292 +       BCV_nvramInit_m = 0x00002000,
    5293 +       BCV_clksyncTstMd_b = 14,
    5294 +       BCV_clksyncTstMd_m = 0x00004000,
    5295 +       BCV_delayBypass_b = 15,
    5296 +       BCV_delayByPass_m = 0x00008000,
    5297 +};
    5298 +#endif                         // __IDT_RST_H__
    5299 diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/spi.h linux-2.6.18.2.patched/include/asm-mips/rc32434/spi.h
    5300 --- linux-2.6.18.2/include/asm-mips/rc32434/spi.h       1970-01-01 01:00:00.000000000 +0100
    5301 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/spi.h       2006-12-17 18:07:21.185720630 +0100
    5302 @@ -0,0 +1,97 @@
    5303 +#ifndef __IDT_SPI_H__
    5304 +#define __IDT_SPI_H__
    5305 +
    5306 +/*******************************************************************************
    5307 + *
    5308 + * Copyright 2002 Integrated Device Technology, Inc.
    5309 + *             All rights reserved.
    5310 + *
    5311 + * Serial Peripheral Interface register definitions.
    5312 + *
    5313 + * File   : $Id: spi.h,v 1.2 2002/06/06 18:34:05 astichte Exp $
    5314 + *
    5315 + * Author : ryan.holmQVist@idt.com
    5316 + * Date   : 20011005
    5317 + * Update :
    5318 + *         $Log: spi.h,v $
    5319 + *         Revision 1.2  2002/06/06 18:34:05  astichte
    5320 + *         Added XXX_PhysicalAddress and XXX_VirtualAddress
    5321 + *     
    5322 + *         Revision 1.1  2002/05/29 17:33:25  sysarch
    5323 + *         jba File moved from vcode/include/idt/acacia
    5324 + *     
    5325 + *
    5326 + ******************************************************************************/
    5327 +
    5328 +#include  <asm/rc32434/types.h>
    5329 +
    5330 +enum {
    5331 +       SPI0_PhysicalAddress = 0x18070000,
    5332 +       SPI_PhysicalAddress = SPI0_PhysicalAddress,
    5333 +
    5334 +       SPI0_VirtualAddress = 0xb8070000,
    5335 +       SPI_VirtualAddress = SPI0_VirtualAddress,
    5336 +};
    5337 +
    5338 +typedef struct {
    5339 +       U32 spcp;               // prescalar. 0=off, * spiClk = sysClk/(2*(spcp+1)*SPR)
    5340 +       U32 spc;                // spi control reg use SPC_
    5341 +       U32 sps;                // spi status reg use SPS_
    5342 +       U32 spd;                // spi data reg use SPD_
    5343 +       U32 siofunc;            // serial IO function use SIOFUNC_
    5344 +       U32 siocfg;             // serial IO config use SIOCFG_
    5345 +       U32 siod;               // serial IO data use SIOD_
    5346 +} volatile *SPI_t;
    5347 +
    5348 +enum {
    5349 +       SPCP_div_b = 0,
    5350 +       SPCP_div_m = 0x000000ff,
    5351 +       SPC_spr_b = 0,
    5352 +       SPC_spr_m = 0x00000003,
    5353 +       SPC_spr_div2_v = 0,
    5354 +       SPC_spr_div4_v = 1,
    5355 +       SPC_spr_div16_v = 2,
    5356 +       SPC_spr_div32_v = 3,
    5357 +       SPC_cpha_b = 2,
    5358 +       SPC_cpha_m = 0x00000004,
    5359 +       SPC_cpol_b = 3,
    5360 +       SPC_cpol_m = 0x00000008,
    5361 +       SPC_mstr_b = 4,
    5362 +       SPC_mstr_m = 0x00000010,
    5363 +       SPC_spe_b = 6,
    5364 +       SPC_spe_m = 0x00000040,
    5365 +       SPC_spie_b = 7,
    5366 +       SPC_spie_m = 0x00000080,
    5367 +
    5368 +       SPS_modf_b = 4,
    5369 +       SPS_modf_m = 0x00000010,
    5370 +       SPS_wcol_b = 6,
    5371 +       SPS_wcol_m = 0x00000040,
    5372 +       SPS_spif_b = 7,
    5373 +       SPS_spif_m = 0x00000070,
    5374 +
    5375 +       SPD_data_b = 0,
    5376 +       SPD_data_m = 0x000000ff,
    5377 +
    5378 +       SIOFUNC_sdo_b = 0,
    5379 +       SIOFUNC_sdo_m = 0x00000001,
    5380 +       SIOFUNC_sdi_b = 1,
    5381 +       SIOFUNC_sdi_m = 0x00000002,
    5382 +       SIOFUNC_sck_b = 2,
    5383 +       SIOFUNC_sck_m = 0x00000004,
    5384 +
    5385 +       SIOCFG_sdo_b = 0,
    5386 +       SIOCFG_sdo_m = 0x00000001,
    5387 +       SIOCFG_sdi_b = 1,
    5388 +       SIOCFG_sdi_m = 0x00000002,
    5389 +       SIOCFG_sck_b = 2,
    5390 +       SIOCFG_sck_m = 0x00000004,
    5391 +
    5392 +       SIOD_sdo_b = 0,
    5393 +       SIOD_sdo_m = 0x00000001,
    5394 +       SIOD_sdi_b = 1,
    5395 +       SIOD_sdi_m = 0x00000002,
    5396 +       SIOD_sck_b = 2,
    5397 +       SIOD_sck_m = 0x00000004,
    5398 +};
    5399 +#endif                         // __IDT_SPI_H__
    5400 diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/tim.h linux-2.6.18.2.patched/include/asm-mips/rc32434/tim.h
    5401 --- linux-2.6.18.2/include/asm-mips/rc32434/tim.h       1970-01-01 01:00:00.000000000 +0100
    5402 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/tim.h       2006-12-17 18:07:21.214716222 +0100
    5403 @@ -0,0 +1,72 @@
     4044diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/timer.h linux-2.6.18.2.patched/include/asm-mips/rc32434/timer.h
     4045--- linux-2.6.18.2/include/asm-mips/rc32434/timer.h     1970-01-01 01:00:00.000000000 +0100
     4046+++ linux-2.6.18.2.patched/include/asm-mips/rc32434/timer.h     2006-12-18 17:16:35.000000000 +0100
     4047@@ -0,0 +1,85 @@
     4048+/**************************************************************************
     4049+ *
     4050+ *  BRIEF MODULE DESCRIPTION
     4051+ *   Definitions for timer registers
     4052+ *
     4053+ *  Copyright 2004 IDT Inc. (rischelp@idt.com)
     4054+ *         
     4055+ *  This program is free software; you can redistribute  it and/or modify it
     4056+ *  under  the terms of  the GNU General  Public License as published by the
     4057+ *  Free Software Foundation;  either version 2 of the  License, or (at your
     4058+ *  option) any later version.
     4059+ *
     4060+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
     4061+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
     4062+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
     4063+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
     4064+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     4065+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
     4066+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
     4067+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
     4068+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     4069+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     4070+ *
     4071+ *  You should have received a copy of the  GNU General Public License along
     4072+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
     4073+ *  675 Mass Ave, Cambridge, MA 02139, USA.
     4074+ *
     4075+ *
     4076+ **************************************************************************
     4077+ * May 2004 rkt,neb.
     4078+ *
     4079+ * Initial Release
     4080+ *
     4081+ *
     4082+ *
     4083+ **************************************************************************
     4084+ */
     4085+
    54044086+#ifndef __IDT_TIM_H__
    54054087+#define __IDT_TIM_H__
    5406 +
    5407 +/*******************************************************************************
    5408 + *
    5409 + * Copyright 2002 Integrated Device Technology, Inc.
    5410 + *             All rights reserved.
    5411 + *
    5412 + * Timer register definition.
    5413 + *
    5414 + * File   : $Id: tim.h,v 1.2 2002/06/06 18:34:05 astichte Exp $
    5415 + *
    5416 + * Author : ryan.holmQVist@idt.com
    5417 + * Date   : 20011005
    5418 + * Update :
    5419 + *         $Log: tim.h,v $
    5420 + *         Revision 1.2  2002/06/06 18:34:05  astichte
    5421 + *         Added XXX_PhysicalAddress and XXX_VirtualAddress
    5422 + *     
    5423 + *         Revision 1.1  2002/05/29 17:33:25  sysarch
    5424 + *         jba File moved from vcode/include/idt/acacia
    5425 + *     
    5426 + *
    5427 + ******************************************************************************/
    5428 +
    5429 +
    5430 +#include  <asm/rc32434/types.h>
    54314088+
    54324089+enum {
    … …  
    54434100+
    54444101+struct TIM_CNTR_s {
    5445 +       U32 count;
    5446 +       U32 compare;
    5447 +       U32 ctc;                //use CTC_
     4102+       u32 count;
     4103+       u32 compare;
     4104+       u32 ctc;                //use CTC_
    54484105+};
    54494106+
    54504107+typedef struct TIM_s {
    54514108+       struct TIM_CNTR_s tim[TIM_Count];
    5452 +       U32 rcount;             //use RCOUNT_
    5453 +       U32 rcompare;           //use RCOMPARE_
    5454 +       U32 rtc;                //use RTC_
     4109+       u32 rcount;             //use RCOUNT_
     4110+       u32 rcompare;           //use RCOMPARE_
     4111+       u32 rtc;                //use RTC_
    54554112+} volatile *TIM_t;
    54564113+
    … …  
    54744131+};
    54754132+#endif                         // __IDT_TIM_H__
    5476 diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/timer.h linux-2.6.18.2.patched/include/asm-mips/rc32434/timer.h
    5477 --- linux-2.6.18.2/include/asm-mips/rc32434/timer.h     1970-01-01 01:00:00.000000000 +0100
    5478 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/timer.h     2006-12-17 18:07:21.243711814 +0100
    5479 @@ -0,0 +1,85 @@
    5480 +/**************************************************************************
    5481 + *
    5482 + *  BRIEF MODULE DESCRIPTION
    5483 + *   Definitions for timer registers
    5484 + *
    5485 + *  Copyright 2004 IDT Inc. (rischelp@idt.com)
    5486 + *         
    5487 + *  This program is free software; you can redistribute  it and/or modify it
    5488 + *  under  the terms of  the GNU General  Public License as published by the
    5489 + *  Free Software Foundation;  either version 2 of the  License, or (at your
    5490 + *  option) any later version.
    5491 + *
    5492 + *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
    5493 + *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
    5494 + *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
    5495 + *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
    5496 + *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
    5497 + *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
    5498 + *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
    5499 + *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
    5500 + *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
    5501 + *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    5502 + *
    5503 + *  You should have received a copy of the  GNU General Public License along
    5504 + *  with this program; if not, write  to the Free Software Foundation, Inc.,
    5505 + *  675 Mass Ave, Cambridge, MA 02139, USA.
    5506 + *
    5507 + *
    5508 + **************************************************************************
    5509 + * May 2004 rkt,neb.
    5510 + *
    5511 + * Initial Release
    5512 + *
    5513 + *
    5514 + *
    5515 + **************************************************************************
    5516 + */
    5517 +
    5518 +#ifndef __IDT_TIM_H__
    5519 +#define __IDT_TIM_H__
    5520 +
    5521 +enum {
    5522 +       TIM0_PhysicalAddress = 0x18028000,
    5523 +       TIM_PhysicalAddress = TIM0_PhysicalAddress,     // Default
    5524 +
    5525 +       TIM0_VirtualAddress = 0xb8028000,
    5526 +       TIM_VirtualAddress = TIM0_VirtualAddress,       // Default
    5527 +};
    5528 +
    5529 +enum {
    5530 +       TIM_Count = 3,
    5531 +};
    5532 +
    5533 +struct TIM_CNTR_s {
    5534 +       u32 count;
    5535 +       u32 compare;
    5536 +       u32 ctc;                //use CTC_
    5537 +};
    5538 +
    5539 +typedef struct TIM_s {
    5540 +       struct TIM_CNTR_s tim[TIM_Count];
    5541 +       u32 rcount;             //use RCOUNT_
    5542 +       u32 rcompare;           //use RCOMPARE_
    5543 +       u32 rtc;                //use RTC_
    5544 +} volatile *TIM_t;
    5545 +
    5546 +enum {
    5547 +       CTC_en_b = 0,
    5548 +       CTC_en_m = 0x00000001,
    5549 +       CTC_to_b = 1,
    5550 +       CTC_to_m = 0x00000002,
    5551 +
    5552 +       RCOUNT_count_b = 0,
    5553 +       RCOUNT_count_m = 0x0000ffff,
    5554 +       RCOMPARE_compare_b = 0,
    5555 +       RCOMPARE_compare_m = 0x0000ffff,
    5556 +       RTC_ce_b = 0,
    5557 +       RTC_ce_m = 0x00000001,
    5558 +       RTC_to_b = 1,
    5559 +       RTC_to_m = 0x00000002,
    5560 +       RTC_rqe_b = 2,
    5561 +       RTC_rqe_m = 0x00000004,
    5562 +
    5563 +};
    5564 +#endif                         // __IDT_TIM_H__
    55654133diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/types.h linux-2.6.18.2.patched/include/asm-mips/rc32434/types.h
    55664134--- linux-2.6.18.2/include/asm-mips/rc32434/types.h     1970-01-01 01:00:00.000000000 +0100
    5567 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/types.h     2006-12-17 18:07:21.272707406 +0100
     4135+++ linux-2.6.18.2.patched/include/asm-mips/rc32434/types.h     2006-12-18 17:16:35.000000000 +0100
    55684136@@ -0,0 +1,39 @@
    55694137+#ifndef __IDT_TYPES_H__
    … …  
    56064174+
    56074175+#endif                         // __IDT_TYPES_H__
    5608 diff -Naurp linux-2.6.18.2/include/asm-mips/rc32434/uart.h linux-2.6.18.2.patched/include/asm-mips/rc32434/uart.h
    5609 --- linux-2.6.18.2/include/asm-mips/rc32434/uart.h      1970-01-01 01:00:00.000000000 +0100
    5610 +++ linux-2.6.18.2.patched/include/asm-mips/rc32434/uart.h      2006-12-17 18:07:21.301702998 +0100
    5611 @@ -0,0 +1,172 @@
    5612 +#ifndef __IDT_UART_H__
    5613 +#define __IDT_UART_H__
    5614 +
    5615 +/*******************************************************************************
    5616 + *
    5617 + * Copyright 2002 Integrated Device Technology, Inc.
    5618 + *             All rights reserved.
    5619 + *
    5620 + * UART register definitions.
    5621 + *
    5622 + * File   : $Id: uart.h,v 1.3 2002/06/06 18:34:05 astichte Exp $
    5623 + *
    5624 + * Author : Allen.Stichter@idt.com
    5625 + * Date   : 20020118
    5626 + * Update :
    5627 + *         $Log: uart.h,v $
    5628 + *         Revision 1.3  2002/06/06 18:34:05  astichte
    5629 + *         Added XXX_PhysicalAddress and XXX_VirtualAddress
    5630 + *     
    5631 + *         Revision 1.2  2002/06/04 17:37:52  astichte
    5632 + *         Updated register definitions.
    5633 + *     
    5634 + *         Revision 1.1  2002/05/29 17:33:25  sysarch
    5635 + *         jba File moved from vcode/include/idt/acacia
    5636 + *     
    5637 + *
    5638 + ******************************************************************************/
    5639 +
    5640 +#include  <asm/rc32434/types.h>
    5641 +
    5642 +enum {
    5643 +       UART_PhysicalAddress = 0x18058000,
    5644 +       UART_PhysicalAddress = UART_PhysicalAddress,    // Default
    5645 +
    5646 +       UART_VirtualAddress = 0xb8058000,
    5647 +       UART_VirtualAddress = UART_VirtualAddress,      // Default
    5648 +};
    5649 +
    5650 +/*
    5651 + * Register definitions are in bytes so we can handle endian problems.
    5652 + */
    5653 +
    5654 +typedef struct UART_s {
    5655 +       union {
    5656 +               U32 const uartrb;       // 0x00 - DLAB=0, read.
    5657 +               U32 uartth;     // 0x00 - DLAB=0, write.
    5658 +               U32 uartdll;    // 0x00 - DLAB=1, read/write.
    5659 +       };
    5660 +
    5661 +       union {
    5662 +               U32 uartie;     // 0x04 - DLAB=0, read/write.
    5663 +               U32 uartdlh;    // 0x04 - DLAB=1, read/write.
    5664 +       };
    5665 +       union {
    5666 +               U32 const uartii;       // 0x08 - DLAB=0, read.
    5667 +               U32 uartfc;     // 0x08 - DLAB=0, write.
    5668 +       };
    5669 +
    5670 +       U32 uartlc;             // 0x0c
    5671 +       U32 uartmc;             // 0x10
    5672 +       U32 uartls;             // 0x14
    5673 +       U32 uartms;             // 0x18
    5674 +       U32 uarts;              // 0x1c
    5675 +} volatile *UART_t;
    5676 +
    5677 +// Reset registers.
    5678 +typedef U32 volatile *UARTRR_t;
    5679 +
    5680 +enum {
    5681 +       UARTIE_rda_b = 0,
    5682 +       UARTIE_rda_m = 0x00000001,
    5683 +       UARTIE_the_b = 1,
    5684 +       UARTIE_the_m = 0x00000002,
    5685 +       UARTIE_rls_b = 2,
    5686 +       UARTIE_rls_m = 0x00000004,
    5687 +       UARTIE_ems_b = 3,
    5688 +       UARTIE_ems_m = 0x00000008,
    5689 +
    5690 +       UARTII_pi_b = 0,
    5691 +       UARTII_pi_m = 0x00000001,
    5692 +       UARTII_iid_b = 1,
    5693 +       UARTII_iid_m = 0x0000000e,
    5694 +       UARTII_iid_ms_v = 0,    // Modem stat-CTS,DSR,RI or DCD.
    5695 +       UARTII_iid_thre_v = 1,  // Trans. Holding Reg. empty.
    5696 +       UARTII_iid_rda_v = 2,   // Receive data available
    5697 +       UARTII_iid_rls_v = 3,   // Overrun, parity, etc, error.
    5698 +       UARTII_iid_res4_v = 4,  // reserved.
    5699 +       UARTII_iid_res5_v = 5,  // reserved.
    5700 +       UARTII_iid_cto_v = 6,   // Character timeout.
    5701 +       UARTII_iid_res7_v = 7,  // reserved.
    5702 +
    5703 +       UARTFC_en_b = 0,
    5704 +       UARTFC_en_m = 0x00000001,
    5705 +       UARTFC_rr_b = 1,
    5706 +       UARTFC_rr_m = 0x00000002,
    5707 +       UARTFC_tr_b = 2,
    5708 +       UARTFC_tr_m = 0x00000004,
    5709 +       UARTFC_dms_b = 3,
    5710 +       UARTFC_dms_m = 0x00000008,
    5711 +       UARTFC_rt_b = 6,
    5712 +       UARTFC_rt_m = 0x000000c0,
    5713 +       UARTFC_rt_1Byte_v = 0,
    5714 +       UARTFC_rt_4Byte_v = 1,
    5715 +       UARTFC_rt_8Byte_v = 2,
    5716 +       UARTFC_rt_14Byte_v = 3,
    5717 +
    5718 +       UARTLC_wls_b = 0,
    5719 +       UARTLC_wls_m = 0x00000003,
    5720 +       UARTLC_wls_5Bits_v = 0,
    5721 +       UARTLC_wls_6Bits_v = 1,
    5722 +       UARTLC_wls_7Bits_v = 2,
    5723 +       UARTLC_wls_8Bits_v = 3,
    5724 +       UARTLC_stb_b = 2,
    5725 +       UARTLC_stb_m = 0x00000004,
    5726 +       UARTLC_pen_b = 3,
    5727 +       UARTLC_pen_m = 0x00000008,
    5728 +       UARTLC_eps_b = 4,
    5729 +       UARTLC_eps_m = 0x00000010,
    5730 +       UARTLC_sp_b = 5,
    5731 +       UARTLC_sp_m = 0x00000020,
    5732 +       UARTLC_sb_b = 6,
    5733 +       UARTLC_sb_m = 0x00000040,
    5734 +       UARTLC_dlab_b = 7,
    5735 +       UARTLC_dlab_m = 0x00000080,
    5736 +
    5737 +       UARTMC_dtr_b = 0,
    5738 +       UARTMC_dtr_m = 0x00000001,
    5739 +       UARTMC_rts_b = 1,
    5740 +       UARTMC_rts_m = 0x00000002,
    5741 +       UARTMC_o1_b = 2,
    5742 +       UARTMC_o1_m = 0x00000004,
    5743 +       UARTMC_o2_b = 3,
    5744 +       UARTMC_o2_m = 0x00000008,
    5745 +       UARTMC_lp_b = 4,
    5746 +       UARTMC_lp_m = 0x00000010,
    5747 +
    5748 +       UARTLS_dr_b = 0,
    5749 +       UARTLS_dr_m = 0x00000001,
    5750 +       UARTLS_oe_b = 1,
    5751 +       UARTLS_oe_m = 0x00000002,
    5752 +       UARTLS_pe_b = 2,
    5753 +       UARTLS_pe_m = 0x00000004,
    5754 +       UARTLS_fe_b = 3,
    5755 +       UARTLS_fe_m = 0x00000008,
    5756 +       UARTLS_bi_b = 4,
    5757 +       UARTLS_bi_m = 0x00000010,
    5758 +       UARTLS_thr_b = 5,
    5759 +       UARTLS_thr_m = 0x00000020,
    5760 +       UARTLS_te_b = 6,
    5761 +       UARTLS_te_m = 0x00000040,
    5762 +       UARTLS_rfe_b = 7,
    5763 +       UARTLS_rfe_m = 0x00000080,
    5764 +
    5765 +       UARTMS_dcts_b = 0,
    5766 +       UARTMS_dcts_m = 0x00000001,
    5767 +       UARTMS_ddsr_b = 1,
    5768 +       UARTMS_ddsr_m = 0x00000002,
    5769 +       UARTMS_teri_b = 2,
    5770 +       UARTMS_teri_m = 0x00000004,
    5771 +       UARTMS_ddcd_b = 3,
    5772 +       UARTMS_ddcd_m = 0x00000008,
    5773 +       UARTMS_cts_b = 4,
    5774 +       UARTMS_cts_m = 0x00000010,
    5775 +       UARTMS_dsr_b = 5,
    5776 +       UARTMS_dsr_m = 0x00000020,
    5777 +       UARTMS_ri_b = 6,
    5778 +       UARTMS_ri_m = 0x00000040,
    5779 +       UARTMS_dcd_b = 7,
    5780 +       UARTMS_dcd_m = 0x00000080,
    5781 +};
    5782 +
    5783 +#endif                         // __IDT_UART_H__
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